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Date: Sun, 3 May 2009 08:25:17 +0300
From: Gleb Natapov <gleb@redhat.com>
Subject: Re: [Qemu-devel] Re: [PATCH  0/8] kvm: Fixes, cleanups and
	livemigration
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To: Anthony Liguori <aliguori@us.ibm.com>
Cc: Jan Kiszka <jan.kiszka@web.de>, Avi Kivity <avi@redhat.com>, qemu-devel@nongnu.org

On Sat, May 02, 2009 at 03:09:27PM -0500, Anthony Liguori wrote:
> Gleb Natapov wrote:
>> On Sat, May 02, 2009 at 10:12:57PM +0300, Avi Kivity wrote:
>>   
>>> Gleb Natapov wrote:
>>>     
>>>>> I think the right thing to do with this is introduce a kvm-cpu 
>>>>> savevm  that stores this information since it isn't relevant to 
>>>>> TCG.  I think  it's arguable whether you want instruction length 
>>>>> there (can you get it  reliably on SVM?).
>>>>>
>>>>>             
>>>> We can't get it on SVM without instruction decoding, but it is not required
>>>> on SVM. It is absolutely essential for soft interrupt/exception injection
>>>> on VMX and has to be a part of migratable state.
>>>>         
>>> We need it in some neutral form so cross-vendor migration can work.
>>>
>>>     
>> VMX->SVM No problem.
>> SVM->VMX bad luck :)  We will have to decode instruction ourself.   
>
> Any reason to not just always decode the instruction then?
>
That is other way around. Any reason to decode instruction if the length
is kindly provided by VMX? :)

But actually, thinking about it, we may not have to decode instruction
even during SVM->VMX migration. Instruction will be re-executed after
migration to VMX instead of event re-injected. Intel advice not to do
that, but given that migration (especially cross vendor) is very rare
and having pending soft interrupt during migration is even more rare I
think it will do.

--
			Gleb.