From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M4A6S-0006VG-Qq for qemu-devel@nongnu.org; Wed, 13 May 2009 04:46:16 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M4A6N-0006V1-Q5 for qemu-devel@nongnu.org; Wed, 13 May 2009 04:46:15 -0400 Received: from [199.232.76.173] (port=57678 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M4A6N-0006Uy-Mx for qemu-devel@nongnu.org; Wed, 13 May 2009 04:46:11 -0400 Received: from mx2.redhat.com ([66.187.237.31]:58500) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1M4A6N-0007Yu-7C for qemu-devel@nongnu.org; Wed, 13 May 2009 04:46:11 -0400 Date: Wed, 13 May 2009 11:45:06 +0300 From: "Michael S. Tsirkin" Subject: Re: [Qemu-devel] Re: [PATCH 2/4] qemu: make default_write_config use mask table Message-ID: <20090513084506.GB31593@redhat.com> References: <1242201052-20536-1-git-send-email-yamahata@valinux.co.jp> <1242201052-20536-3-git-send-email-yamahata@valinux.co.jp> <20090513080724.GA31593@redhat.com> <20090513082746.GJ22497%yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20090513082746.GJ22497%yamahata@valinux.co.jp> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: mtosatti@redhat.com, qemu-devel@nongnu.org, armbru@redhat.com On Wed, May 13, 2009 at 05:27:46PM +0900, Isaku Yamahata wrote: > On Wed, May 13, 2009 at 11:07:24AM +0300, Michael S. Tsirkin wrote: > > On Wed, May 13, 2009 at 04:50:50PM +0900, Isaku Yamahata wrote: > > > Change much of hw/pci to use symbolic constants and a table-driven > > > design: add a mask table with writable bits set and readonly bits unset. > > > Detect change by comparing original and new registers. > > > > > > As a result, writing a single byte in BAR registers now works as it > > > should. Writing to upper limit registers in the bridge also works as it > > > should. Writes to BAR registers trigger mapping update. Code is also > > > shorter. > > > > > > Changelog since v1 > > > - simplify the code some more > > > - use PCI_CONFIG_SPACE_SIZE instead of 0x100 > > > - only trigger pci update when IO/MEM bits in command register have changed > > > > > > Signed-off-by: Michael S. Tsirkin > > > > You must also add > > From: Michael S. Tsirkin > > > > at the top, otherwise git won't record the authorship > > information in log correctly. > > Oh sorry, does this looks okay? > > From: Michael S. Tsirkin > > Change much of hw/pci to use symbolic constants and a table-driven > design: add a mask table with writable bits set and readonly bits unset. > Detect change by comparing original and new registers. > > As a result, writing a single byte in BAR registers now works as it > should. Writing to upper limit registers in the bridge also works as it > should. Writes to BAR registers trigger mapping update. Code is also > shorter. > > Changelog since v1 > - simplify the code some more > - use PCI_CONFIG_SPACE_SIZE instead of 0x100 > - only trigger pci update when IO/MEM bits in command register have changed > > Signed-off-by: Michael S. Tsirkin > --- > hw/pci.c | 147 +++++++++++++------------------------------------------------- > hw/pci.h | 18 +++++++- > 2 files changed, 47 insertions(+), 118 deletions(-) > Right. But Changelog should come after ---: you want git to ignore it. -- MST