From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M541u-0001t7-Ur for qemu-devel@nongnu.org; Fri, 15 May 2009 16:29:18 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M541t-0001sv-Eb for qemu-devel@nongnu.org; Fri, 15 May 2009 16:29:17 -0400 Received: from [199.232.76.173] (port=33752 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M541t-0001ss-9t for qemu-devel@nongnu.org; Fri, 15 May 2009 16:29:17 -0400 Received: from trinity.fluff.org ([89.16.178.74]:53118) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1M541s-0005M5-S8 for qemu-devel@nongnu.org; Fri, 15 May 2009 16:29:17 -0400 Date: Fri, 15 May 2009 21:29:09 +0100 From: Ben Dooks Subject: Re: [Qemu-devel] [PATCH 15/15] Add bast and smdk2410 boards which use S3C2410 SOC Message-ID: <20090515202909.GE23895@trinity.fluff.org> References: <1241599494-28654-1-git-send-email-vince@simtec.co.uk> <1241599494-28654-16-git-send-email-vince@simtec.co.uk> <20090514123519.GB9256@game.jcrosoft.org> <20090515094104.GA4629@derik> <20090515195257.GJ16288@game.jcrosoft.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20090515195257.GJ16288@game.jcrosoft.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jean-Christophe PLAGNIOL-VILLARD Cc: Vincent Sanders , qemu-devel@nongnu.org, Ben Dooks On Fri, May 15, 2009 at 09:52:57PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > On 10:41 Fri 15 May , Vincent Sanders wrote: > > On Thu, May 14, 2009 at 02:35:19PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: > > > On 09:44 Wed 06 May , Vincent Sanders wrote: > > > > Signed-off-by: Vincent Sanders > > > > --- > > > tks for the pflash support forhe bast > > > is it possible to have the same on the smdk2410? > > > > > > IIRC there is a 8Mib > > > > I would, of course, be happy to accomodate. However I dont have data > > on where the writable flash copy is mapped. I've not seen anything in the UBoot sources, and having looked at the schematic there is an link option to change the ROM nCS from nGCS0 to nGCS1. However looking at the uboot sources it seems to only use the nGCS0 addressing. > > The s3c2410 chip select 0 (where the NOR is booted from) has no write > > line so a second writable mapping is required (hence the second > > mapping on the bast). > > > > It may turn out the flash cannot be reprogramed with the CPU and the > > external JTAG boundry scan must be used. If this is the case it really > > is a ROM mapping from an emulation POV. > > > > If anyone can provide information on if/where the smdk2410 writable > > flash area is I will gladly add it. > Based on u-boot code > there is 2 version of the boards > one with a 8Mbit AMD flash > and an other one with a 4Mbit AMD flash > > map at 0x00000000 > and writeable as the u-boot env is stored at 0xF0000 and 0x70000 > > Ben could maybe confirm us The manual says that nGCS0 is read-only, but unfortunately I've not got an SMDK2410 available to verify that the manual is correct in this respect. I might still have a board with an S3C2410 on to see if this can be reproduced by experimentation over the weekend. > Best Regards, > J. -- -- Ben Q: What's a light-year? A: One-third less calories than a regular year.