From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org, Anthony Liguori <anthony@codemonkey.ws>,
Blue Swirl <blauwirbel@gmail.com>,
mtosatti@redhat.com, armbru@redhat.com
Subject: Re: [Qemu-devel] [PATCH] qemu: cleanup default_write_config
Date: Tue, 19 May 2009 11:56:32 +0300 [thread overview]
Message-ID: <20090519085632.GA29160@redhat.com> (raw)
In-Reply-To: <20090503220122.GA25047@redhat.com>
On Mon, May 04, 2009 at 01:01:22AM +0300, Michael S. Tsirkin wrote:
> Change pci default write config to use symbolic constants and a table-driven
> design: add a mask table with writable bits set and readonly bits unset.
> This makes it much easier to support multi-byte registers.
>
> As a result, writing a single byte in BAR registers now works as
> it should. Writing to upper limit registers in the bridge
> also works as it should. Code is also shorter.
>
> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Any feedback on this patch?
I'd like to use mask table as the basis for MSI integration work (setting
up appropriate masks for capability bits) and if there are issues with
this approach, I'd like to know.
--
MST
next prev parent reply other threads:[~2009-05-19 8:57 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-05-03 22:01 [Qemu-devel] [PATCH] qemu: cleanup default_write_config Michael S. Tsirkin
2009-05-19 8:56 ` Michael S. Tsirkin [this message]
2009-05-19 14:11 ` Marcelo Tosatti
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