From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M6qU4-0006R1-9v for qemu-devel@nongnu.org; Wed, 20 May 2009 14:25:44 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M6qTz-0006Q1-MP for qemu-devel@nongnu.org; Wed, 20 May 2009 14:25:43 -0400 Received: from [199.232.76.173] (port=38685 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M6qTz-0006Pt-3E for qemu-devel@nongnu.org; Wed, 20 May 2009 14:25:39 -0400 Received: from mx20.gnu.org ([199.232.41.8]:54622) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1M6qTy-0004co-6r for qemu-devel@nongnu.org; Wed, 20 May 2009 14:25:38 -0400 Received: from mx2.redhat.com ([66.187.237.31]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1M6qTx-0007bg-Ee for qemu-devel@nongnu.org; Wed, 20 May 2009 14:25:37 -0400 Date: Wed, 20 May 2009 21:24:11 +0300 From: "Michael S. Tsirkin" Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Message-ID: <20090520175641.GB22935@redhat.com> References: <20090520162130.GA22109@redhat.com> <20090520173536.GA22935@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: Carsten Otte , kvm@vger.kernel.org, Rusty Russell , qemu-devel@nongnu.org, virtualization@lists.linux-foundation.org, Christian Borntraeger , avi@redhat.com On Wed, May 20, 2009 at 08:44:31PM +0300, Blue Swirl wrote: > On 5/20/09, Michael S. Tsirkin wrote: > > On Wed, May 20, 2009 at 08:21:01PM +0300, Blue Swirl wrote: > > > On 5/20/09, Michael S. Tsirkin wrote: > > > > define api for allocating/setting up msi-x irqs, and for updating them > > > > with msi-x vector information, supply implementation in ioapic. Please > > > > comment on this API: I intend to port my msi-x patch to work on top of > > > > it. > > > > > > > > Signed-off-by: Michael S. Tsirkin > > > > > > Sparc64 also uses packets ("mondos", not implemented yet) for > > > interrupt vector data, there the packet size is 8 * 64 bits. > > > I think we should aim for a more generic API that covers this case also. > > > > > > Are you sure this is a good idea? MSI is tied to PCI, and PCI only has > > MSI, not "mondos". What code would benefit from this abstraction? > > Sparc64 emulation, of course. I think also the API would be neater. > > > > For example, irq.c could support opaque packet payload of > > > unspecified/predefined size. MSI packet structure should be defined > > > in ioapic.c. > > > > > > Note that MSI does not have packets and MSI interrupts do not pass any payload. > > I don't know too much about MSI, what's the 'data' field in msi_state then? opaque stuff that apic uses to select irq and cpu. -- MST