From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M77DI-0005DH-Sy for qemu-devel@nongnu.org; Thu, 21 May 2009 08:17:32 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M77DD-0005BL-Vf for qemu-devel@nongnu.org; Thu, 21 May 2009 08:17:32 -0400 Received: from [199.232.76.173] (port=45718 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M77DD-0005BI-T6 for qemu-devel@nongnu.org; Thu, 21 May 2009 08:17:27 -0400 Received: from mx2.redhat.com ([66.187.237.31]:51785) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1M77DD-0001FT-Ek for qemu-devel@nongnu.org; Thu, 21 May 2009 08:17:27 -0400 Date: Thu, 21 May 2009 15:14:24 +0300 From: "Michael S. Tsirkin" Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Message-ID: <20090521121424.GD25309@redhat.com> References: <20090520162130.GA22109@redhat.com> <200905211134.21184.paul@codesourcery.com> <4A15346C.8090906@redhat.com> <200905211301.52089.paul@codesourcery.com> <4A154432.1060808@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4A154432.1060808@redhat.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Carsten Otte , kvm@vger.kernel.org, Rusty Russell , qemu-devel@nongnu.org, virtualization@lists.linux-foundation.org, Christian Borntraeger , Paul Brook On Thu, May 21, 2009 at 03:08:18PM +0300, Avi Kivity wrote: > Paul Brook wrote: >>>>> In any case we need some internal API for this, and qemu_irq looks like >>>>> a good choice. >>>>> >>>> What do you expect to be using this API? >>>> >>> virtio, emulated devices capable of supporting MSI (e1000?), device >>> assignment (not yet in qemu.git). >>> >> >> It probably makes sense to have common infrastructure in pci.c to >> expose/implement device side MSI functionality. However I see no need >> for a direct API between the device and the APIC. We already have an >> API for memory accesses and MMIO regions. I'm pretty sure a system >> could implement MSI by pointing the device at system ram, and having >> the CPU periodically poll that. >> > > Instead of writing directly, let's abstract it behind a qemu_set_irq(). > This is easier for device authors. The default implementation of the > irq callback could write to apic memory, while for kvm we can directly > trigger the interrupt via the kvm APIs. Right. -- MST