From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1M786V-0006ef-Oh for qemu-devel@nongnu.org; Thu, 21 May 2009 09:14:35 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1M786Q-0006cr-KV for qemu-devel@nongnu.org; Thu, 21 May 2009 09:14:34 -0400 Received: from [199.232.76.173] (port=58674 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1M786Q-0006ck-BU for qemu-devel@nongnu.org; Thu, 21 May 2009 09:14:30 -0400 Received: from mx2.redhat.com ([66.187.237.31]:48042) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1M786P-0007Mc-Bb for qemu-devel@nongnu.org; Thu, 21 May 2009 09:14:30 -0400 Date: Thu, 21 May 2009 16:11:26 +0300 From: "Michael S. Tsirkin" Subject: Re: [Qemu-devel] [PATCH] qemu: msi irq allocation api Message-ID: <20090521131126.GG25309@redhat.com> References: <20090520162130.GA22109@redhat.com> <200905211301.52089.paul@codesourcery.com> <4A154432.1060808@redhat.com> <200905211329.41578.paul@codesourcery.com> <4A154B60.4080701@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4A154B60.4080701@redhat.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Carsten Otte , kvm@vger.kernel.org, Rusty Russell , qemu-devel@nongnu.org, virtualization@lists.linux-foundation.org, Christian Borntraeger , Paul Brook On Thu, May 21, 2009 at 03:38:56PM +0300, Avi Kivity wrote: > Paul Brook wrote: >>> Instead of writing directly, let's abstract it behind a qemu_set_irq(). >>> This is easier for device authors. The default implementation of the >>> irq callback could write to apic memory, while for kvm we can directly >>> trigger the interrupt via the kvm APIs. >>> >> >> I'm still not convinced. >> >> A tight coupling between PCI devices and the APIC is just going to >> cause us problems later one. I'm going to come back to the fact that >> these are memory writes so once we get IOMMU support they will >> presumably be subject to remapping by that, just like any other memory >> access. >> > > I'm not suggesting the qemu_irq will extend all the way to the apic. > Think of it as connecting the device core with its interrupt unit. > >> Even ignoring that, qemu_irq isn't really the right interface. A MSI is a one- >> off event, not a level state. OTOH stl_phys is exactly the right interface. >> > > The qemu_irq callback should do an stl_phys(). Actually, it seems we can't do it this way now as stl_phys only gets a 32 bit address. So I'll use apic_deliver for now, but yes, it will be easy to later rewrite MSI implementation this way if that limitatiuon is lifted. > The device is happy > since it's using the same API it uses for non-MSI. The APIC is happy > since it isn't connected directly to the device. stl_phys() is happy > since it sees more traffic and can serve more ads. kvm is happy since > it can hijack the callback to throw the interrupt directly into the > kernel. > >> The KVM interface should be contained within the APIC implementation. >> > > Tricky, but doable. > > -- > error compiling committee.c: too many arguments to function -- MST