From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43)
	id 1MAjFJ-0000aw-7v
	for qemu-devel@nongnu.org; Sun, 31 May 2009 07:30:33 -0400
Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43)
	id 1MAjFD-0000UL-9E
	for qemu-devel@nongnu.org; Sun, 31 May 2009 07:30:32 -0400
Received: from [199.232.76.173] (port=36861 helo=monty-python.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1MAjFD-0000UH-4r
	for qemu-devel@nongnu.org; Sun, 31 May 2009 07:30:27 -0400
Received: from verein.lst.de ([213.95.11.210]:36001)
	by monty-python.gnu.org with esmtps
	(TLS-1.0:DHE_RSA_3DES_EDE_CBC_SHA1:24) (Exim 4.60)
	(envelope-from <hch@lst.de>) id 1MAjFC-00078V-Kl
	for qemu-devel@nongnu.org; Sun, 31 May 2009 07:30:27 -0400
Date: Sun, 31 May 2009 13:02:53 +0200
From: Christoph Hellwig <hch@lst.de>
Subject: Re: [Qemu-devel] [PATCH 2/3] Add PCI memory region registration
Message-ID: <20090531110253.GA13812@lst.de>
References: <1243157375-14329-1-git-send-email-avi@redhat.com>
	<1243157375-14329-3-git-send-email-avi@redhat.com>
	<4A1D4961.1010903@us.ibm.com> <4A1D5604.60003@redhat.com>
	<4A1D5837.3010705@us.ibm.com> <4A1D5B44.3040207@redhat.com>
	<4A1DBFC1.6060603@codemonkey.ws>
Mime-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <4A1DBFC1.6060603@codemonkey.ws>
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.gnu.org/pipermail/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Anthony Liguori <anthony@codemonkey.ws>
Cc: Anthony Liguori <aliguori@us.ibm.com>, Avi Kivity <avi@redhat.com>, qemu-devel@nongnu.org

On Wed, May 27, 2009 at 05:33:37PM -0500, Anthony Liguori wrote:
>    pci_register_io_region(&d->dev, 0, 0x100,
>                           PCI_ADDRESS_SPACE_IO, rtl8139_ioport_read, 
> rtl8139_ioport_write, s);
> 
>    pci_register_io_region(&d->dev, 1, 0x100,
>                           PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_read, 
> rtl8139_mmio_write, s);
> 
> Moreover, you could probably drop the opaque parameter and and just use 
> d->dev.  I hope it's possible to get from one to the other.

I also think this is a much more natural API, and would simplify drivers
a lot.  As for the naming the PCI spec uses the term bar for these
PIO/MMIO regions, so maybe call it pci_register_bar or pci_setup_bar?

> I think it's worth looking at changing the signatures of the mem 
> read/write functions.  Introducing a size parameter would greatly 
> simplify adding 64-bit IO support, for instance.

Yeah.