From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MB6Oz-0007yM-L3 for qemu-devel@nongnu.org; Mon, 01 Jun 2009 08:14:05 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MB6Ov-0007rL-0h for qemu-devel@nongnu.org; Mon, 01 Jun 2009 08:14:04 -0400 Received: from [199.232.76.173] (port=41512 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MB6Ou-0007qv-N6 for qemu-devel@nongnu.org; Mon, 01 Jun 2009 08:14:00 -0400 Received: from mx20.gnu.org ([199.232.41.8]:61597) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MB6Ou-0004qu-8w for qemu-devel@nongnu.org; Mon, 01 Jun 2009 08:14:00 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MB6Oo-0007eT-Ju for qemu-devel@nongnu.org; Mon, 01 Jun 2009 08:13:54 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Add ARM920T to ARM emulation Date: Mon, 1 Jun 2009 13:13:48 +0100 References: <1243603405-12989-1-git-send-email-vince@simtec.co.uk> <200905292305.28740.paul@codesourcery.com> <20090601113512.GA16957@shareable.org> In-Reply-To: <20090601113512.GA16957@shareable.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200906011313.49802.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jamie Lokier Cc: Vincent Sanders , qemu-devel@nongnu.org > I notice that ARMv4T adds the BX instruction, implying that B isn't > able to switch to Thumb mode although it can in later architectures (I > never saw the point in BX, and I guess ARM ended up the same :-) > > Is the behaviour defined to _not_ switch to Thumb when using B to an > address with the low order bit set, or does it trap, or is it > unpredictable? You need to look again at the B instruction. Hopefully then you'll realise why you're talking nonsense. B is a direct branch that never changes mode. BX is an indirect branch that mode switches based on the low address bit. BL and BLX(register) are exactly the same as B/BX except they also set LR. BLX(immediate) is a direct mode switching call. loads into the PC either ignore(v4t) or mode switch (v5) on the low address bit. ALU writes to the PC always ignore the low bit in Thumb mode. In ARM mode the low bit is either ignored(v6) or used to mode switch (v7). BX was introduced in v4t, BLX was introduced in v5. Paul