From: "M. Warner Losh" <imp@bsdimp.com>
To: arnaud.patard@rtp-net.org
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] fix configure for mips o32
Date: Wed, 03 Jun 2009 08:29:20 -0600 (MDT) [thread overview]
Message-ID: <20090603.082920.514365571.imp@bsdimp.com> (raw)
In-Reply-To: <87prdlv6wf.fsf@lechat.rtp-net.org>
In message: <87prdlv6wf.fsf@lechat.rtp-net.org>
Arnaud Patard (Rtp) <arnaud.patard@rtp-net.org> writes:
: The commit 1ad2134f914dfd4c8f92307c94c9a5a1e28f0059 is defining
: target_phys_bits and set it to 64 for all mips machines including mipsel
: machines which are 32 bit. This patch set it to 32.
But R4000PC and R4400PC machines ran in Little Endian mode and had
64-bit registers.
It is only the recent mips32 and mips32r2 machines that have 32-bit
registers...
Warner
next prev parent reply other threads:[~2009-06-03 14:31 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-03 12:28 [Qemu-devel] [PATCH] fix configure for mips o32 Arnaud Patard
2009-06-03 14:29 ` M. Warner Losh [this message]
2009-06-03 15:17 ` Arnaud Patard
2009-06-03 14:46 ` Paul Brook
2009-06-03 15:20 ` Arnaud Patard
2009-06-03 15:22 ` Paul Brook
2009-06-04 9:18 ` Arnaud Patard
2009-06-05 7:29 ` M. Warner Losh
2009-06-03 15:34 ` M. Warner Losh
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