From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MDylz-0008SV-Py for qemu-devel@nongnu.org; Tue, 09 Jun 2009 06:41:43 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MDylt-0008Nb-B0 for qemu-devel@nongnu.org; Tue, 09 Jun 2009 06:41:41 -0400 Received: from [199.232.76.173] (port=56257 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MDyls-0008NR-Kh for qemu-devel@nongnu.org; Tue, 09 Jun 2009 06:41:37 -0400 Received: from mx2.redhat.com ([66.187.237.31]:37462) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MDyls-0007PH-4h for qemu-devel@nongnu.org; Tue, 09 Jun 2009 06:41:36 -0400 Date: Tue, 9 Jun 2009 13:41:33 +0300 From: Gleb Natapov Message-ID: <20090609104133.GW27210@redhat.com> References: <1244538657-7878-1-git-send-email-gleb@redhat.com> <1244538657-7878-2-git-send-email-gleb@redhat.com> <4A2E3795.6020404@siemens.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4A2E3795.6020404@siemens.com> Subject: [Qemu-devel] Re: [PATCH 2/2] Don't register cpu reset handler for cpu with APIC. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka Cc: qemu-devel@nongnu.org On Tue, Jun 09, 2009 at 12:21:09PM +0200, Jan Kiszka wrote: > Gleb Natapov wrote: > > APIC reset handler already resets cpu. Also register cpu_reset handler > > directly to make it impossible to add additional code to main_cpu_reset() > > by mistake. > > > > Signed-off-by: Gleb Natapov > > --- > > hw/pc.c | 10 +++------- > > 1 files changed, 3 insertions(+), 7 deletions(-) > > > > diff --git a/hw/pc.c b/hw/pc.c > > index d5b4112..5e7b115 100644 > > --- a/hw/pc.c > > +++ b/hw/pc.c > > @@ -751,12 +751,6 @@ static void load_linux(target_phys_addr_t option_rom, > > generate_bootsect(option_rom, gpr, seg, 0); > > } > > > > -static void main_cpu_reset(void *opaque) > > -{ > > - CPUState *env = opaque; > > - cpu_reset(env); > > -} > > - > > static const int ide_iobase[2] = { 0x1f0, 0x170 }; > > static const int ide_iobase2[2] = { 0x3f6, 0x376 }; > > static const int ide_irq[2] = { 14, 15 }; > > @@ -878,9 +872,11 @@ static void pc_init1(ram_addr_t ram_size, > > } > > if (i != 0) > > env->halted = 1; > > - qemu_register_reset(main_cpu_reset, 0, env); > > if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) { > > apic_init(env); > > + } else { > > + /* APIC reset callback resets cpu */ > > That comment should rather go into the previous block (and please remove > the tab). > > > + qemu_register_reset((QEMUResetHandler*)cpu_reset, 0, env); > > } > > } > > > > Looks fine to me otherwise. Will give these patches a try later today. > Let me know when you tested it and if no additional fixes needed I'll resend fixed version. -- Gleb.