From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MEKe6-0000j0-VS for qemu-devel@nongnu.org; Wed, 10 Jun 2009 06:03:03 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MEKe3-0000PG-2M for qemu-devel@nongnu.org; Wed, 10 Jun 2009 06:03:02 -0400 Received: from [199.232.76.173] (port=54017 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MEKe2-0000Ox-QS for qemu-devel@nongnu.org; Wed, 10 Jun 2009 06:02:58 -0400 Received: from mx2.redhat.com ([66.187.237.31]:60290) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MEKe2-0003XY-3O for qemu-devel@nongnu.org; Wed, 10 Jun 2009 06:02:58 -0400 Date: Wed, 10 Jun 2009 12:59:28 +0300 From: "Michael S. Tsirkin" Subject: Re: [Qemu-devel] [PATCHv3 07/13] qemu: minimal MSI/MSI-X implementation for PC Message-ID: <20090610095928.GG6844@redhat.com> References: <20090605102347.GH26770@redhat.com> <20090609173333.GB19375@poweredge.glommer> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20090609173333.GB19375@poweredge.glommer> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Glauber Costa Cc: Carsten Otte , kvm@vger.kernel.org, Rusty Russell , qemu-devel@nongnu.org, virtualization@lists.linux-foundation.org, Blue Swirl , Christian Borntraeger , Paul Brook , Avi Kivity On Tue, Jun 09, 2009 at 02:33:33PM -0300, Glauber Costa wrote: > > env = cpu_single_env; > > if (!env) > > @@ -727,7 +762,6 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) > > printf("APIC write: %08x = %08x\n", (uint32_t)addr, val); > > #endif > > > > - index = (addr >> 4) & 0xff; > > switch(index) { > > case 0x02: > > s->id = (val >> 24); > > @@ -911,6 +945,7 @@ int apic_init(CPUState *env) > > s->cpu_env = env; > > > > apic_reset(s); > > + msix_supported = 1; > > > > /* XXX: mapping more APICs at the same memory location */ > > if (apic_io_memory == 0) { > > @@ -918,7 +953,8 @@ int apic_init(CPUState *env) > > on the global memory bus. */ > > apic_io_memory = cpu_register_io_memory(0, apic_mem_read, > > apic_mem_write, NULL); > > - cpu_register_physical_memory(s->apicbase & ~0xfff, 0x1000, > > + /* XXX: what if the base changes? */ > > + cpu_register_physical_memory(MSI_ADDR_BASE, MSI_ADDR_SIZE, > > apic_io_memory); > +1 > > I think you have a point here. Your patch is in no way worse than what we had, > but we're currently not handling correctly the case of base address changing. Yep. > Guess it is not common in normal apic usage for OSes... -- MST