From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MGaob-0004yj-1I for qemu-devel@nongnu.org; Tue, 16 Jun 2009 11:43:13 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MGaoW-0004n0-Dh for qemu-devel@nongnu.org; Tue, 16 Jun 2009 11:43:12 -0400 Received: from [199.232.76.173] (port=34572 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MGaoW-0004mO-4H for qemu-devel@nongnu.org; Tue, 16 Jun 2009 11:43:08 -0400 Received: from mail2.shareable.org ([80.68.89.115]:57522) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MGaoV-0004Mi-V9 for qemu-devel@nongnu.org; Tue, 16 Jun 2009 11:43:08 -0400 Date: Tue, 16 Jun 2009 16:43:00 +0100 From: Jamie Lokier Subject: Re: [Qemu-devel] Register uhci_reset() callback. Message-ID: <20090616154300.GK29040@shareable.org> References: <20090611084808.GA19508@redhat.com> <200906111441.34151.paul@codesourcery.com> <20090611134656.GC19508@redhat.com> <200906111453.13421.paul@codesourcery.com> <20090611140054.GD19508@redhat.com> <20090611163803.GB12367@shareable.org> <20090611164045.GA954@redhat.com> <4A3674D9.9050607@redhat.com> <20090616150018.GE29040@shareable.org> <4A37B7B9.5050105@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4A37B7B9.5050105@redhat.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Paul Brook , Gleb Natapov , qemu-devel@nongnu.org Avi Kivity wrote: > On 06/16/2009 06:00 PM, Jamie Lokier wrote: > >Avi Kivity wrote: > > > >>On 06/11/2009 07:40 PM, Gleb Natapov wrote: > >> > >>>>Now, a CPU-only reset, such as triple fault on x86, that's a bit > >>>>different. > >>>> > >>>> > >>>> > >>>On x86 triple fault wired to system reset. > >>> > >>> > >>Some actually wire triple fault (shutdown) to init. It's pretty broken. > >> > > > >That sounds useful, actually, for those 286 OSes which use > >triple-fault to switch from protected mode to real mode. No need to > >reinitialise all the hardware if it just restarts the CPU. > > > > Ah, I remember now. But on modern hardware it breaks badly. Intel > processors block INIT if vmx is enabled, and the rest of the hardware > isn't reset so it could be dmaing all over the place. When running 286 code, continuing to DMA is actually correct if using triple-fault to switch to real mode. (Yes I still have some 286 code lying around somewhere). It's to context switch, not stop devices :-) Obviously nowadays if you have 286 code that you need to run, you'd run it in a VM, not real hardware, so that backward compatibility is quite unnecessary now, and actively unhelpful. But a VM should offer it, either as an option or always, so you can run old 286 code in the VM. Perhaps the ideal thing to do in a VM (i.e. QEMU) is map triple-fault to CPU reset and BIOS fast restart when in 286 protected mode, and map triple-fault to full system reset when not in 286 protected mode. -- Jamie