From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MGbwD-0006GY-St for qemu-devel@nongnu.org; Tue, 16 Jun 2009 12:55:09 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MGbw9-0006B9-TL for qemu-devel@nongnu.org; Tue, 16 Jun 2009 12:55:09 -0400 Received: from [199.232.76.173] (port=36629 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MGbw9-0006Aj-Lb for qemu-devel@nongnu.org; Tue, 16 Jun 2009 12:55:05 -0400 Received: from mx20.gnu.org ([199.232.41.8]:46401) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MGbw9-00007n-51 for qemu-devel@nongnu.org; Tue, 16 Jun 2009 12:55:05 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MGbw7-0001wJ-SX for qemu-devel@nongnu.org; Tue, 16 Jun 2009 12:55:04 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Register uhci_reset() callback. Date: Tue, 16 Jun 2009 17:54:54 +0100 References: <20090611084808.GA19508@redhat.com> <20090616152050.GD782@redhat.com> In-Reply-To: <20090616152050.GD782@redhat.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200906161754.59643.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: Blue Swirl , qemu-devel@nongnu.org, Avi Kivity On Tuesday 16 June 2009, Gleb Natapov wrote: > On Tue, Jun 16, 2009 at 06:14:51PM +0300, Blue Swirl wrote: > > > Because interrupt line is stuck a guest can't get to the point where it > > > loads a driver to the second device. For outside observer the guest > > > just hangs. > > > > I see. The problem is in piix_pci interrupt handling, pci_irq_levels[] > > should be set to zero on reset. > > The patch that does that was rejected earlier :) > http://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00342.html > http://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00344.html You're both wrong. If allow devices to be reset independently then they should probably set theit IRQ output on reset. IRQ muxes (e.g. PCI busses) should handle reseting and save/restore of their own internal state. Devices should not cause IRQ state changes on restore. Commit 3dcd219f is incorrect. Paul