From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MGe97-0006OV-GJ for qemu-devel@nongnu.org; Tue, 16 Jun 2009 15:16:37 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MGe93-0006Ma-Re for qemu-devel@nongnu.org; Tue, 16 Jun 2009 15:16:37 -0400 Received: from [199.232.76.173] (port=45487 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MGe93-0006MO-NJ for qemu-devel@nongnu.org; Tue, 16 Jun 2009 15:16:33 -0400 Received: from mx20.gnu.org ([199.232.41.8]:51430) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MGe93-0008Vs-HI for qemu-devel@nongnu.org; Tue, 16 Jun 2009 15:16:33 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MGe92-0000pH-Iw for qemu-devel@nongnu.org; Tue, 16 Jun 2009 15:16:32 -0400 From: Paul Brook Subject: Re: [Qemu-devel] Register uhci_reset() callback. Date: Tue, 16 Jun 2009 20:16:29 +0100 References: <20090611084808.GA19508@redhat.com> <20090616185218.GK11893@shareable.org> In-Reply-To: <20090616185218.GK11893@shareable.org> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200906162016.30736.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl , Avi Kivity , Gleb Natapov > If any initialisation order might occur, then you really need all the > states to be restored, including output levels, without any side > effects, and then enable processing in all devices together. There is no output or input level state, other than implicitly as part of device internal state. qemu_irq is a stateless mechanism for communicating level change events. In effect we only model edge triggering, and individual devices emulate level triggering on top of that. Paul