From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MKFPU-0003RZ-BD for qemu-devel@nongnu.org; Fri, 26 Jun 2009 13:40:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MKFPP-0003QB-Tm for qemu-devel@nongnu.org; Fri, 26 Jun 2009 13:40:24 -0400 Received: from [199.232.76.173] (port=41496 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MKFPP-0003Q8-MS for qemu-devel@nongnu.org; Fri, 26 Jun 2009 13:40:19 -0400 Received: from mx20.gnu.org ([199.232.41.8]:1881) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MKFPP-0006yA-9D for qemu-devel@nongnu.org; Fri, 26 Jun 2009 13:40:19 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MKFPN-0002jv-Fp for qemu-devel@nongnu.org; Fri, 26 Jun 2009 13:40:17 -0400 From: Paul Brook Subject: Re: [Qemu-devel] [RFC PATCH] s390x-linux-user Date: Fri, 26 Jun 2009 18:40:09 +0100 References: <200906261849.43746.uli@suse.de> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200906261840.10828.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl On Friday 26 June 2009, Blue Swirl wrote: > On 6/26/09, Ulrich Hecht wrote: > > There is a very peculiar S/390 instruction called "EXECUTE". What it > > does is to take another instruction stored somewhere in memory, > > logical-OR the second byte of the instruction with the LSB of R0 and then > > execute the result, without changing the instruction in memory or the > > program counter. Any idea how to implement this in QEMU? Currently, I'm > > interpreting the couple of instructions that GCC uses EXECUTE with, but > > in the long run that would amount to implementing a second emulator... > > Maybe something like this: Make a special TB of the EXECUTE > instruction and add LSB of R0 to TB flags for these TBs. Then you can > examine R0, OR and generate code at translation time. The TBs linking > to EXECUTE TB may need to be special too in order to track for R0. That's not sufficient. The results also depend on the referenced instruction. Paul