From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MKG0G-000392-Sb for qemu-devel@nongnu.org; Fri, 26 Jun 2009 14:18:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MKG0C-000324-5v for qemu-devel@nongnu.org; Fri, 26 Jun 2009 14:18:24 -0400 Received: from [199.232.76.173] (port=34538 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MKG0B-00031Y-OF for qemu-devel@nongnu.org; Fri, 26 Jun 2009 14:18:19 -0400 Received: from mx20.gnu.org ([199.232.41.8]:3446) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MKG0B-0007yd-GZ for qemu-devel@nongnu.org; Fri, 26 Jun 2009 14:18:19 -0400 Received: from mail.codesourcery.com ([65.74.133.4]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MKG0A-0004hx-Ln for qemu-devel@nongnu.org; Fri, 26 Jun 2009 14:18:18 -0400 From: Paul Brook Subject: Re: [Qemu-devel] [RFC PATCH] s390x-linux-user Date: Fri, 26 Jun 2009 19:18:12 +0100 References: <200906261849.43746.uli@suse.de> <200906261859.03172.paul@codesourcery.com> In-Reply-To: <200906261859.03172.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Content-Disposition: inline Message-Id: <200906261918.13448.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Blue Swirl > No. You need the whole instruction. Which is fetched from memory, so is not > easily available when you're checking TB flags. > To do it this way, I think you'd need to split the instruction in two. The > first part would load the whole instruciton from memory, or with r0, then > store the result in an internal CPU pseudo-register to the whole > instruction, and cuse annother TB lookup. The second would generate code > that cleared the pseudo-register then executed the code that was stored in > it. >You'd have to include the whole of the pseudo-register in TB_FLAGS, and I >doubt you've got enough bits for that. On second reading I've spotted a way around this. Start with the two-phase generation as described above, but make sure the TB is invalidated before the next EXECUTE instruction is run. This means that instead of the whole instruction in the TB flags you just need a "half way through EXECUTE" bit. Reliably invalidating the TB may get a bit hairy, but I'm pretty sure it's doable. Paul