* [Qemu-devel] Re: Inquring about Arm11mpcore
2009-08-13 11:16 ` [Qemu-devel] " Antti P Miettinen
@ 2009-08-17 14:23 ` Antti P Miettinen
0 siblings, 0 replies; 4+ messages in thread
From: Antti P Miettinen @ 2009-08-17 14:23 UTC (permalink / raw)
To: qemu-devel
Antti P Miettinen <ananaza@iki.fi> writes:
> Paul Brook <paul@codesourcery.com> writes:
>> Make sure you're using the right board. qemu emulates a revB Emulation
>> Baseboard plus core tile. This should work out the box.
>
> Do you have a linux kernel config that should work?
Seems that at least recent kernels want to check the PROCID
register. The below quick-and-dirty hack allows booting 2.6.30 on
realview with arm11mpcore. At least the following config options seem
relevant:
CONFIG_MACH_REALVIEW_EB=y
CONFIG_REALVIEW_EB_ARM11MP=y
CONFIG_REALVIEW_EB_ARM11MP_REVB=y
# CONFIG_REALVIEW_HIGH_PHYS_OFFSET is not set
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c
index 11b3787..3884e0d 100644
--- a/hw/arm_sysctl.c
+++ b/hw/arm_sysctl.c
@@ -23,6 +23,7 @@ typedef struct {
uint32_t flags;
uint32_t nvflags;
uint32_t resetlevel;
+ uint32_t proc_id;
} arm_sysctl_state;
static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
@@ -76,8 +77,11 @@ static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
case 0x60: /* MISC */
return 0;
case 0x84: /* PROCID0 */
- /* ??? Don't know what the proper value for the core tile ID is. */
- return 0x02000000;
+ /* ??? Don't know what the proper value for the core tile ID is.
+ * See e.g. Linux arch/arm/mach-realview/include/mach/board-eb.h
+ * REALVIEW_EB_PROC_XX defines.
+ */
+ return s->proc_id;
case 0x88: /* PROCID1 */
return 0xff000000;
case 0x64: /* DMAPSR0 */
@@ -204,12 +208,13 @@ static void arm_sysctl_init1(SysBusDevice *dev)
}
/* Legacy helper function. */
-void arm_sysctl_init(uint32_t base, uint32_t sys_id)
+void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id)
{
DeviceState *dev;
dev = qdev_create(NULL, "realview_sysctl");
qdev_prop_set_uint32(dev, "sys_id", sys_id);
+ qdev_prop_set_uint32(dev, "proc_id", proc_id);
qdev_init(dev);
sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
}
@@ -220,6 +225,7 @@ static SysBusDeviceInfo arm_sysctl_info = {
.qdev.size = sizeof(arm_sysctl_state),
.qdev.props = (Property[]) {
DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
+ DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0),
DEFINE_PROP_END_OF_LIST(),
}
};
diff --git a/hw/primecell.h b/hw/primecell.h
index 490ef8c..fb456ad 100644
--- a/hw/primecell.h
+++ b/hw/primecell.h
@@ -9,6 +9,6 @@
void *pl080_init(uint32_t base, qemu_irq irq, int nchannels);
/* arm_sysctl.c */
-void arm_sysctl_init(uint32_t base, uint32_t sys_id);
+void arm_sysctl_init(uint32_t base, uint32_t sys_id, uint32_t proc_id);
#endif
diff --git a/hw/realview.c b/hw/realview.c
index 8e176b9..523cab7 100644
--- a/hw/realview.c
+++ b/hw/realview.c
@@ -19,7 +19,7 @@
/* Board init. */
static struct arm_boot_info realview_binfo = {
- .loader_start = 0x0,
+ .loader_start = 0x0 /*0x70000000*/,
.smp_loader_start = 0x80000000,
.board_id = 0x33b,
};
@@ -40,13 +40,19 @@ static void realview_init(ram_addr_t ram_size,
int done_smc = 0;
qemu_irq cpu_irq[4];
int ncpu;
+ uint32_t proc_id = 0; /* ARM7TDMI :-) */
if (!cpu_model)
cpu_model = "arm926";
/* FIXME: obey smp_cpus. */
if (strcmp(cpu_model, "arm11mpcore") == 0) {
+ proc_id = 0x06000000;
ncpu = 4;
} else {
+ if (strcmp(cpu_model, "arm926") == 0)
+ proc_id = 0x02000000;
+ else if (strcmp(cpu_model, "arm1136") == 0)
+ proc_id = 0x04000000;
ncpu = 1;
}
@@ -71,7 +77,7 @@ static void realview_init(ram_addr_t ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
- arm_sysctl_init(0x10000000, 0xc1400400);
+ arm_sysctl_init(0x10000000, 0xc1400400, proc_id);
if (ncpu == 1) {
/* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
diff --git a/hw/versatilepb.c b/hw/versatilepb.c
index 3371121..d77674b 100644
--- a/hw/versatilepb.c
+++ b/hw/versatilepb.c
@@ -170,9 +170,16 @@ static void versatile_init(ram_addr_t ram_size,
NICInfo *nd;
int n;
int done_smc = 0;
+ uint32_t proc_id = 0;
if (!cpu_model)
cpu_model = "arm926";
+ if (strcmp(cpu_model, "arm11mpcore") == 0)
+ proc_id = 0x06000000;
+ else if (strcmp(cpu_model, "arm926") == 0)
+ proc_id = 0x02000000;
+ else if (strcmp(cpu_model, "arm1136") == 0)
+ proc_id = 0x04000000;
env = cpu_init(cpu_model);
if (!env) {
fprintf(stderr, "Unable to find CPU definition\n");
@@ -183,7 +190,7 @@ static void versatile_init(ram_addr_t ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
- arm_sysctl_init(0x10000000, 0x41007004);
+ arm_sysctl_init(0x10000000, 0x41007004, proc_id);
cpu_pic = arm_pic_init_cpu(env);
dev = sysbus_create_varargs("pl190", 0x10140000,
cpu_pic[0], cpu_pic[1], NULL);
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