This patch makes Seabios use emu_ver to determine QEMU and KVM specific configuration at runtime. Signed-off-by: Jes Sorensen --- src/acpi.c | 14 +++++++------- src/config.h | 2 -- src/pciinit.c | 18 +++++++++++++----- src/post.c | 2 +- 4 files changed, 21 insertions(+), 15 deletions(-) Index: seabios/src/acpi.c =================================================================== --- seabios.orig/src/acpi.c +++ seabios/src/acpi.c @@ -196,12 +196,8 @@ struct madt_io_apic * lines start */ } PACKED; -#if CONFIG_KVM -/* IRQs 5,9,10,11 */ -#define PCI_ISA_IRQ_MASK 0x0e20 -#else -#define PCI_ISA_IRQ_MASK 0x0000 -#endif +/* IRQs 5,9,10,11 for QEMU/KQEMU/KVM */ +#define QEMU_PCI_ISA_IRQ_MASK 0x0e20 struct madt_intsrcovr { APIC_HEADER_DEF @@ -339,8 +335,12 @@ build_madt(struct rsdt_descriptor_rev1 * intsrcovr->flags = 0; /* conforms to bus specifications */ intsrcovr++; } + int pci_isa_irq_mask = 0; + if ((emu_ver & 0xff00) == EMU_QEMU) + pci_isa_irq_mask = QEMU_PCI_ISA_IRQ_MASK; + for (i = 1; i < 16; i++) { - if (!(PCI_ISA_IRQ_MASK & (1 << i))) + if (!(pci_isa_irq_mask & (1 << i))) /* No need for a INT source override structure. */ continue; memset(intsrcovr, 0, sizeof(*intsrcovr)); Index: seabios/src/config.h =================================================================== --- seabios.orig/src/config.h +++ seabios/src/config.h @@ -12,8 +12,6 @@ #define CONFIG_APPNAME6 "BOCHS " #define CONFIG_APPNAME4 "BXPC" -// Configure for use with KVM. -#define CONFIG_KVM 1 // Configure as a coreboot payload. #define CONFIG_COREBOOT 0 Index: seabios/src/pciinit.c =================================================================== --- seabios.orig/src/pciinit.c +++ seabios/src/pciinit.c @@ -18,12 +18,15 @@ static u32 pci_bios_io_addr; static u32 pci_bios_mem_addr; static u32 pci_bios_bigmem_addr; /* host irqs corresponding to PCI irqs A-D */ -static u8 pci_irqs[4] = { -#if CONFIG_KVM - 10, 10, 11, 11 -#else + +static u8 *pci_irqs; + +static u8 default_pci_irqs[4] = { 11, 9, 11, 9 -#endif +}; + +static u8 qemu_pci_irqs[4] = { + 10, 10, 11, 11 }; static void pci_set_io_region_addr(u16 bdf, int region_num, u32 addr) @@ -194,6 +197,11 @@ pci_bios_setup(void) // Already done by coreboot. return; + if ((emu_ver & 0xff00) == EMU_QEMU) + pci_irqs = qemu_pci_irqs; + else + pci_irqs = default_pci_irqs; + pci_bios_io_addr = 0xc000; pci_bios_mem_addr = 0xc0000000; pci_bios_bigmem_addr = RamSize; Index: seabios/src/post.c =================================================================== --- seabios.orig/src/post.c +++ seabios/src/post.c @@ -129,7 +129,7 @@ ram_probe(void) , E820_RESERVED); add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED); - if (CONFIG_KVM) + if (emu_ver == EMU_QEMU_KVM) // 4 pages before the bios, 3 pages for vmx tss pages, the // other page for EPT real mode pagetable add_e820(0xfffbc000, 4*4096, E820_RESERVED);