From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mv6g3-0003sn-R7 for qemu-devel@nongnu.org; Tue, 06 Oct 2009 05:49:52 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mv6fy-0003rf-LB for qemu-devel@nongnu.org; Tue, 06 Oct 2009 05:49:50 -0400 Received: from [199.232.76.173] (port=43586 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mv6fy-0003rW-76 for qemu-devel@nongnu.org; Tue, 06 Oct 2009 05:49:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:63462) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Mv6fx-0001jL-Oy for qemu-devel@nongnu.org; Tue, 06 Oct 2009 05:49:46 -0400 Date: Tue, 6 Oct 2009 11:47:43 +0200 From: "Michael S. Tsirkin" Message-ID: <20091006094743.GB8899@redhat.com> References: <1254737223-16129-1-git-send-email-yamahata@valinux.co.jp> <1254737223-16129-13-git-send-email-yamahata@valinux.co.jp> <20091005124711.GE30799@redhat.com> <20091006094202.GC32367%yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20091006094202.GC32367%yamahata@valinux.co.jp> Subject: [Qemu-devel] Re: [PATCH 12/23] pci: 64bit bar support. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On Tue, Oct 06, 2009 at 06:42:02PM +0900, Isaku Yamahata wrote: > On Mon, Oct 05, 2009 at 02:47:11PM +0200, Michael S. Tsirkin wrote: > > > @@ -462,7 +474,11 @@ static void pci_update_mappings(PCIDevice *d) > > > } > > > } else { > > > if (cmd & PCI_COMMAND_MEMORY) { > > > - new_addr = pci_get_long(d->config + config_ofs); > > > + if (pci_bar_is_mem64(r)) { > > > + new_addr = pci_get_quad(d->config + config_ofs); > > > > From previous patch, config_ofs is region_num * 4 > > This is incorrect for 64 bit regions. > > I don't see any problems. In the following example, > 0, 2 ... will be used for region_number and 1 is left unused. > > BAR0 64bit memory > BAR1 used by BAR0 64bit > BAR2 ... Oh, I see. It's up to the user of pci_register_bar to allocate sane region numbers. Fine. Maybe add a comment before pci_register_bar about legal values for region_num: not everyone knows about PCI internals. > -- > yamahata