From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MvvLV-0008AI-Sn for qemu-devel@nongnu.org; Thu, 08 Oct 2009 11:56:01 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MvvLL-0007ts-GF for qemu-devel@nongnu.org; Thu, 08 Oct 2009 11:55:59 -0400 Received: from [199.232.76.173] (port=57370 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MvvLK-0007sT-UH for qemu-devel@nongnu.org; Thu, 08 Oct 2009 11:55:50 -0400 Received: from mx1.redhat.com ([209.132.183.28]:22042) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MvvLK-0001ZO-6U for qemu-devel@nongnu.org; Thu, 08 Oct 2009 11:55:50 -0400 Date: Thu, 8 Oct 2009 17:53:46 +0200 From: "Michael S. Tsirkin" Message-ID: <20091008155346.GB13660@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCHv2] seabios: enable io/memory unconditionally List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: avi@redhat.com Cc: Anthony Liguori , "qemu-devel@nongnu.org" , kvm-devel VGA adapters need to claim memory and i/o transactions even if they do not have any i/o or memory bars. E.g. PCI spec, page 297, gives an example of such a device: Programming interface 0000 0000b VGA-compatible controller. Memory addresses 0A 0000h through 0B FFFFh. I/O addresses 3B0h to 3BBh and 3C0h to 3DFh and all aliases of these addresses. While we could check for these devices and special-case them, it is easier to fix this by enabling i/o and memory space unconditionally: devices that do not support it will just ignore this setting. Signed-off-by: Michael S. Tsirkin --- Reposting for qemu tree. src/pciinit.c | 17 ++++++----------- 1 files changed, 6 insertions(+), 11 deletions(-) diff --git a/src/pciinit.c b/src/pciinit.c index 0d558a9..eab082a 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -28,7 +28,6 @@ static u8 pci_irqs[4] = { static void pci_set_io_region_addr(u16 bdf, int region_num, u32 addr) { - u16 cmd; u32 ofs, old_addr; if (region_num == PCI_ROM_SLOT) { @@ -41,16 +40,6 @@ static void pci_set_io_region_addr(u16 bdf, int region_num, u32 addr) pci_config_writel(bdf, ofs, addr); dprintf(1, "region %d: 0x%08x\n", region_num, addr); - - /* enable memory mappings */ - cmd = pci_config_readw(bdf, PCI_COMMAND); - if (region_num == PCI_ROM_SLOT) - cmd |= PCI_COMMAND_MEMORY; - else if (old_addr & PCI_BASE_ADDRESS_SPACE_IO) - cmd |= PCI_COMMAND_IO; - else - cmd |= PCI_COMMAND_MEMORY; - pci_config_writew(bdf, PCI_COMMAND, cmd); } /* return the global irq number corresponding to a given device irq @@ -95,6 +84,7 @@ static void pci_bios_init_device(u16 bdf) { int class; u32 *paddr; + uint16_t cmd; int i, pin, pic_irq, vendor_id, device_id; class = pci_config_readw(bdf, PCI_CLASS_DEVICE); @@ -165,6 +155,11 @@ static void pci_bios_init_device(u16 bdf) break; } + /* enable memory mappings */ + cmd = pci_config_readw(d, PCI_COMMAND); + cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY; + pci_config_writew(d, PCI_COMMAND, cmd); + /* map the interrupt */ pin = pci_config_readb(bdf, PCI_INTERRUPT_PIN); if (pin != 0) { -- 1.6.5.rc2