From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Mw9SE-000402-5i for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:59:54 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Mw9S9-0003up-8j for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:59:53 -0400 Received: from [199.232.76.173] (port=53331 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Mw9S8-0003ub-Po for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:59:48 -0400 Received: from mx20.gnu.org ([199.232.41.8]:7848) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Mw9S7-0004ga-SL for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:59:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Mw9S6-0008Of-MA for qemu-devel@nongnu.org; Fri, 09 Oct 2009 02:59:47 -0400 Date: Fri, 9 Oct 2009 08:57:40 +0200 From: "Michael S. Tsirkin" Message-ID: <20091009065740.GF9942@redhat.com> References: <1255069742-15724-1-git-send-email-yamahata@valinux.co.jp> <1255069742-15724-9-git-send-email-yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1255069742-15724-9-git-send-email-yamahata@valinux.co.jp> Subject: [Qemu-devel] Re: [PATCH V5 08/29] pci: s/PCI_ADDRESS_SPACE_/PCI_BASE_ADDRESS_SPACE_/ to match pci_regs.h List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On Fri, Oct 09, 2009 at 03:28:41PM +0900, Isaku Yamahata wrote: > make constants for pci base address match pci_regs.h by > renaming PCI_ADDRESS_SPACE_xxx to PCI_BASE_ADDRESS_SPACE_xxx. The less macros we have to maintain by our own, the better. BTW, long term, do we want to split these into pci_regs.h, which can then be just exported from linux? Anthony? Acked-by: Michael S. Tsirkin > Signed-off-by: Isaku Yamahata > --- > hw/ac97.c | 5 +++-- > hw/cirrus_vga.c | 4 ++-- > hw/e1000.c | 4 ++-- > hw/eepro100.c | 18 ++++++++++-------- > hw/es1370.c | 2 +- > hw/ide/pci.c | 12 ++++++------ > hw/lsi53c895a.c | 6 +++--- > hw/macio.c | 2 +- > hw/ne2000.c | 2 +- > hw/openpic.c | 2 +- > hw/pci.c | 10 +++++----- > hw/pci.h | 7 +++---- > hw/pcnet.c | 4 ++-- > hw/rtl8139.c | 4 ++-- > hw/sun4u.c | 4 ++-- > hw/usb-ohci.c | 2 +- > hw/usb-uhci.c | 2 +- > hw/vga-pci.c | 4 ++-- > hw/virtio-pci.c | 4 ++-- > hw/vmware_vga.c | 4 ++-- > hw/wdt_i6300esb.c | 2 +- > 21 files changed, 53 insertions(+), 51 deletions(-) > > diff --git a/hw/ac97.c b/hw/ac97.c > index 610ca60..534f899 100644 > --- a/hw/ac97.c > +++ b/hw/ac97.c > @@ -1331,8 +1331,9 @@ static int ac97_initfn (PCIDevice *dev) > c[0x3c] = 0x00; /* intr_ln interrupt line rw */ > c[0x3d] = 0x01; /* intr_pn interrupt pin ro */ > > - pci_register_bar (&s->dev, 0, 256 * 4, PCI_ADDRESS_SPACE_IO, ac97_map); > - pci_register_bar (&s->dev, 1, 64 * 4, PCI_ADDRESS_SPACE_IO, ac97_map); > + pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO, > + ac97_map); > + pci_register_bar (&s->dev, 1, 64 * 4, PCI_BASE_ADDRESS_SPACE_IO, ac97_map); > register_savevm ("ac97", 0, 2, ac97_save, ac97_load, s); > qemu_register_reset (ac97_on_reset, s); > AUD_register_card ("ac97", &s->card); > diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c > index 04ba68d..0eb058d 100644 > --- a/hw/cirrus_vga.c > +++ b/hw/cirrus_vga.c > @@ -3239,10 +3239,10 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev) > /* memory #1 memory-mapped I/O */ > /* XXX: s->vga.vram_size must be a power of two */ > pci_register_bar((PCIDevice *)d, 0, 0x2000000, > - PCI_ADDRESS_SPACE_MEM_PREFETCH, cirrus_pci_lfb_map); > + PCI_BASE_ADDRESS_MEM_PREFETCH, cirrus_pci_lfb_map); > if (device_id == CIRRUS_ID_CLGD5446) { > pci_register_bar((PCIDevice *)d, 1, CIRRUS_PNPMMIO_SIZE, > - PCI_ADDRESS_SPACE_MEM, cirrus_pci_mmio_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, cirrus_pci_mmio_map); > } > vmstate_register(0, &vmstate_pci_cirrus_vga, d); > /* XXX: ROM BIOS */ > diff --git a/hw/e1000.c b/hw/e1000.c > index f123bda..ffa337b 100644 > --- a/hw/e1000.c > +++ b/hw/e1000.c > @@ -1106,10 +1106,10 @@ static int pci_e1000_init(PCIDevice *pci_dev) > e1000_mmio_write, d); > > pci_register_bar((PCIDevice *)d, 0, PNPMMIO_SIZE, > - PCI_ADDRESS_SPACE_MEM, e1000_mmio_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, e1000_mmio_map); > > pci_register_bar((PCIDevice *)d, 1, IOPORT_SIZE, > - PCI_ADDRESS_SPACE_IO, ioport_map); > + PCI_BASE_ADDRESS_SPACE_IO, ioport_map); > > memmove(d->eeprom_data, e1000_eeprom_template, > sizeof e1000_eeprom_template); > diff --git a/hw/eepro100.c b/hw/eepro100.c > index 445d46c..4691028 100644 > --- a/hw/eepro100.c > +++ b/hw/eepro100.c > @@ -428,18 +428,20 @@ static void pci_reset(EEPRO100State * s) > /* BIST (built-in self test) */ > #if defined(TARGET_I386) > // !!! workaround for buggy bios > -//~ #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0 > +//~ #define PCI_BASE_ADDRESS_MEM_PREFETCH 0 > #endif > #if 0 > /* PCI Base Address Registers */ > /* CSR Memory Mapped Base Address */ > PCI_CONFIG_32(PCI_BASE_ADDRESS_0, > - PCI_ADDRESS_SPACE_MEM | PCI_ADDRESS_SPACE_MEM_PREFETCH); > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH); > /* CSR I/O Mapped Base Address */ > - PCI_CONFIG_32(PCI_BASE_ADDRESS_1, PCI_ADDRESS_SPACE_IO); > + PCI_CONFIG_32(PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_SPACE_IO); > #if 0 > /* Flash Memory Mapped Base Address */ > - PCI_CONFIG_32(PCI_BASE_ADDRESS_2, 0xfffe0000 | PCI_ADDRESS_SPACE_MEM); > + PCI_CONFIG_32(PCI_BASE_ADDRESS_2, > + 0xfffe0000 | PCI_BASE_ADDRESS_SPACE_MEMORY); > #endif > #endif > /* Expansion ROM Base Address (depends on boot disable!!!) */ > @@ -1818,11 +1820,11 @@ static int nic_init(PCIDevice *pci_dev, uint32_t device) > cpu_register_io_memory(pci_mmio_read, pci_mmio_write, s); > > pci_register_bar(&s->dev, 0, PCI_MEM_SIZE, > - PCI_ADDRESS_SPACE_MEM | > - PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_mmio_map); > - pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_ADDRESS_SPACE_IO, > + PCI_BASE_ADDRESS_SPACE_MEMORY | > + PCI_BASE_ADDRESS_MEM_PREFETCH, pci_mmio_map); > + pci_register_bar(&s->dev, 1, PCI_IO_SIZE, PCI_BASE_ADDRESS_SPACE_IO, > pci_map); > - pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_ADDRESS_SPACE_MEM, > + pci_register_bar(&s->dev, 2, PCI_FLASH_SIZE, PCI_BASE_ADDRESS_SPACE_MEMORY, > pci_mmio_map); > > qdev_get_macaddr(&s->dev.qdev, s->macaddr); > diff --git a/hw/es1370.c b/hw/es1370.c > index 9071a48..f048951 100644 > --- a/hw/es1370.c > +++ b/hw/es1370.c > @@ -1027,7 +1027,7 @@ static int es1370_initfn (PCIDevice *dev) > c[0x3e] = 0x0c; > c[0x3f] = 0x80; > > - pci_register_bar (&s->dev, 0, 256, PCI_ADDRESS_SPACE_IO, es1370_map); > + pci_register_bar (&s->dev, 0, 256, PCI_BASE_ADDRESS_SPACE_IO, es1370_map); > register_savevm ("es1370", 0, 2, es1370_save, es1370_load, s); > qemu_register_reset (es1370_on_reset, s); > > diff --git a/hw/ide/pci.c b/hw/ide/pci.c > index 9504e44..be5b1dc 100644 > --- a/hw/ide/pci.c > +++ b/hw/ide/pci.c > @@ -414,15 +414,15 @@ static int pci_cmd646_ide_initfn(PCIDevice *dev) > } > > pci_register_bar((PCIDevice *)d, 0, 0x8, > - PCI_ADDRESS_SPACE_IO, ide_map); > + PCI_BASE_ADDRESS_SPACE_IO, ide_map); > pci_register_bar((PCIDevice *)d, 1, 0x4, > - PCI_ADDRESS_SPACE_IO, ide_map); > + PCI_BASE_ADDRESS_SPACE_IO, ide_map); > pci_register_bar((PCIDevice *)d, 2, 0x8, > - PCI_ADDRESS_SPACE_IO, ide_map); > + PCI_BASE_ADDRESS_SPACE_IO, ide_map); > pci_register_bar((PCIDevice *)d, 3, 0x4, > - PCI_ADDRESS_SPACE_IO, ide_map); > + PCI_BASE_ADDRESS_SPACE_IO, ide_map); > pci_register_bar((PCIDevice *)d, 4, 0x10, > - PCI_ADDRESS_SPACE_IO, bmdma_map); > + PCI_BASE_ADDRESS_SPACE_IO, bmdma_map); > > pci_conf[0x3d] = 0x01; // interrupt on pin 1 > > @@ -478,7 +478,7 @@ static int pci_piix_ide_initfn(PCIIDEState *d) > piix3_reset(d); > > pci_register_bar((PCIDevice *)d, 4, 0x10, > - PCI_ADDRESS_SPACE_IO, bmdma_map); > + PCI_BASE_ADDRESS_SPACE_IO, bmdma_map); > > register_savevm("ide", 0, 3, pci_ide_save, pci_ide_load, d); > > diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c > index a4d3a57..2c5232c 100644 > --- a/hw/lsi53c895a.c > +++ b/hw/lsi53c895a.c > @@ -2166,11 +2166,11 @@ static int lsi_scsi_init(PCIDevice *dev) > lsi_ram_writefn, s); > > pci_register_bar((struct PCIDevice *)s, 0, 256, > - PCI_ADDRESS_SPACE_IO, lsi_io_mapfunc); > + PCI_BASE_ADDRESS_SPACE_IO, lsi_io_mapfunc); > pci_register_bar((struct PCIDevice *)s, 1, 0x400, > - PCI_ADDRESS_SPACE_MEM, lsi_mmio_mapfunc); > + PCI_BASE_ADDRESS_SPACE_MEMORY, lsi_mmio_mapfunc); > pci_register_bar((struct PCIDevice *)s, 2, 0x2000, > - PCI_ADDRESS_SPACE_MEM, lsi_ram_mapfunc); > + PCI_BASE_ADDRESS_SPACE_MEMORY, lsi_ram_mapfunc); > s->queue = qemu_malloc(sizeof(lsi_queue)); > s->queue_len = 1; > s->active_commands = 0; > diff --git a/hw/macio.c b/hw/macio.c > index 8cfadfc..0703abc 100644 > --- a/hw/macio.c > +++ b/hw/macio.c > @@ -115,5 +115,5 @@ void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index, > d->config[0x3d] = 0x01; // interrupt on pin 1 > > pci_register_bar(d, 0, 0x80000, > - PCI_ADDRESS_SPACE_MEM, macio_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, macio_map); > } > diff --git a/hw/ne2000.c b/hw/ne2000.c > index 87f1e59..a9a4577 100644 > --- a/hw/ne2000.c > +++ b/hw/ne2000.c > @@ -755,7 +755,7 @@ static int pci_ne2000_init(PCIDevice *pci_dev) > pci_conf[0x3d] = 1; // interrupt pin 0 > > pci_register_bar(&d->dev, 0, 0x100, > - PCI_ADDRESS_SPACE_IO, ne2000_map); > + PCI_BASE_ADDRESS_SPACE_IO, ne2000_map); > s = &d->ne2000; > s->irq = d->dev.irq[0]; > qdev_get_macaddr(&d->dev.qdev, s->macaddr); > diff --git a/hw/openpic.c b/hw/openpic.c > index 74dde6d..5de44a3 100644 > --- a/hw/openpic.c > +++ b/hw/openpic.c > @@ -1213,7 +1213,7 @@ qemu_irq *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, > > /* Register I/O spaces */ > pci_register_bar((PCIDevice *)opp, 0, 0x40000, > - PCI_ADDRESS_SPACE_MEM, &openpic_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, &openpic_map); > } else { > opp = qemu_mallocz(sizeof(openpic_t)); > } > diff --git a/hw/pci.c b/hw/pci.c > index eaf471a..634899a 100644 > --- a/hw/pci.c > +++ b/hw/pci.c > @@ -420,7 +420,7 @@ static void pci_unregister_io_regions(PCIDevice *pci_dev) > r = &pci_dev->io_regions[i]; > if (!r->size || r->addr == PCI_BAR_UNMAPPED) > continue; > - if (r->type == PCI_ADDRESS_SPACE_IO) { > + if (r->type == PCI_BASE_ADDRESS_SPACE_IO) { > isa_unassign_ioport(r->addr, r->size); > } else { > cpu_register_physical_memory(pci_to_cpu_addr(r->addr), > @@ -492,7 +492,7 @@ static void pci_update_mappings(PCIDevice *d) > for(i = 0; i < PCI_NUM_REGIONS; i++) { > r = &d->io_regions[i]; > if (r->size != 0) { > - if (r->type & PCI_ADDRESS_SPACE_IO) { > + if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { > if (cmd & PCI_COMMAND_IO) { > new_addr = pci_get_long(d->config + pci_bar(i)); > new_addr = new_addr & ~(r->size - 1); > @@ -529,7 +529,7 @@ static void pci_update_mappings(PCIDevice *d) > /* now do the real mapping */ > if (new_addr != r->addr) { > if (r->addr != PCI_BAR_UNMAPPED) { > - if (r->type & PCI_ADDRESS_SPACE_IO) { > + if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { > int class; > /* NOTE: specific hack for IDE in PC case: > only one byte must be mapped. */ > @@ -771,7 +771,7 @@ static void pci_info_device(PCIDevice *d) > r = &d->io_regions[i]; > if (r->size != 0) { > monitor_printf(mon, " BAR%d: ", i); > - if (r->type & PCI_ADDRESS_SPACE_IO) { > + if (r->type & PCI_BASE_ADDRESS_SPACE_IO) { > monitor_printf(mon, "I/O at 0x%04x [0x%04x].\n", > r->addr, r->addr + r->size - 1); > } else { > @@ -1123,7 +1123,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent) > if (!r->size) > continue; > monitor_printf(mon, "%*sbar %d: %s at 0x%x [0x%x]\n", indent, "", > - i, r->type & PCI_ADDRESS_SPACE_IO ? "i/o" : "mem", > + i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem", > r->addr, r->addr + r->size - 1); > } > } > diff --git a/hw/pci.h b/hw/pci.h > index 157995c..bbce56b 100644 > --- a/hw/pci.h > +++ b/hw/pci.h > @@ -79,10 +79,6 @@ typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, > uint32_t addr, uint32_t size, int type); > typedef int PCIUnregisterFunc(PCIDevice *pci_dev); > > -#define PCI_ADDRESS_SPACE_MEM 0x00 > -#define PCI_ADDRESS_SPACE_IO 0x01 > -#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 > - > typedef struct PCIIORegion { > uint32_t addr; /* current PCI mapping address. -1 means not mapped */ > #define PCI_BAR_UNMAPPED (~(uint32_t)0) > @@ -113,6 +109,9 @@ typedef struct PCIIORegion { > #define PCI_HEADER_TYPE_CARDBUS 2 > #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 > #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ > +#define PCI_BASE_ADDRESS_SPACE_IO 0x01 > +#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00 > +#define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */ > #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ > #define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ > #define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */ > diff --git a/hw/pcnet.c b/hw/pcnet.c > index afeaca7..1097445 100644 > --- a/hw/pcnet.c > +++ b/hw/pcnet.c > @@ -2058,10 +2058,10 @@ static int pci_pcnet_init(PCIDevice *pci_dev) > cpu_register_io_memory(pcnet_mmio_read, pcnet_mmio_write, &d->state); > > pci_register_bar((PCIDevice *)d, 0, PCNET_IOPORT_SIZE, > - PCI_ADDRESS_SPACE_IO, pcnet_ioport_map); > + PCI_BASE_ADDRESS_SPACE_IO, pcnet_ioport_map); > > pci_register_bar((PCIDevice *)d, 1, PCNET_PNPMMIO_SIZE, > - PCI_ADDRESS_SPACE_MEM, pcnet_mmio_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, pcnet_mmio_map); > > s->irq = pci_dev->irq[0]; > s->phys_mem_read = pci_physical_memory_read; > diff --git a/hw/rtl8139.c b/hw/rtl8139.c > index 10daeb2..608085f 100644 > --- a/hw/rtl8139.c > +++ b/hw/rtl8139.c > @@ -3458,10 +3458,10 @@ static int pci_rtl8139_init(PCIDevice *dev) > cpu_register_io_memory(rtl8139_mmio_read, rtl8139_mmio_write, s); > > pci_register_bar(&s->dev, 0, 0x100, > - PCI_ADDRESS_SPACE_IO, rtl8139_ioport_map); > + PCI_BASE_ADDRESS_SPACE_IO, rtl8139_ioport_map); > > pci_register_bar(&s->dev, 1, 0x100, > - PCI_ADDRESS_SPACE_MEM, rtl8139_mmio_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, rtl8139_mmio_map); > > qdev_get_macaddr(&dev->qdev, s->macaddr); > rtl8139_reset(&s->dev.qdev); > diff --git a/hw/sun4u.c b/hw/sun4u.c > index 276b17b..314dea6 100644 > --- a/hw/sun4u.c > +++ b/hw/sun4u.c > @@ -386,9 +386,9 @@ pci_ebus_init1(PCIDevice *s) > s->config[0x0D] = 0x0a; // latency_timer > s->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type > > - pci_register_bar(s, 0, 0x1000000, PCI_ADDRESS_SPACE_MEM, > + pci_register_bar(s, 0, 0x1000000, PCI_BASE_ADDRESS_SPACE_MEMORY, > ebus_mmio_mapfunc); > - pci_register_bar(s, 1, 0x800000, PCI_ADDRESS_SPACE_MEM, > + pci_register_bar(s, 1, 0x800000, PCI_BASE_ADDRESS_SPACE_MEMORY, > ebus_mmio_mapfunc); > return 0; > } > diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c > index 48ccd49..d498401 100644 > --- a/hw/usb-ohci.c > +++ b/hw/usb-ohci.c > @@ -1730,7 +1730,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev) > OHCI_TYPE_PCI, ohci->pci_dev.name, 0); > > pci_register_bar((struct PCIDevice *)ohci, 0, 256, > - PCI_ADDRESS_SPACE_MEM, ohci_mapfunc); > + PCI_BASE_ADDRESS_SPACE_MEMORY, ohci_mapfunc); > return 0; > } > > diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c > index a3ed9b2..e54fff0 100644 > --- a/hw/usb-uhci.c > +++ b/hw/usb-uhci.c > @@ -1095,7 +1095,7 @@ static int usb_uhci_common_initfn(UHCIState *s) > /* Use region 4 for consistency with real hardware. BSD guests seem > to rely on this. */ > pci_register_bar(&s->dev, 4, 0x20, > - PCI_ADDRESS_SPACE_IO, uhci_map); > + PCI_BASE_ADDRESS_SPACE_IO, uhci_map); > > register_savevm("uhci", 0, 1, uhci_save, uhci_load, s); > return 0; > diff --git a/hw/vga-pci.c b/hw/vga-pci.c > index 5e75938..0a2982a 100644 > --- a/hw/vga-pci.c > +++ b/hw/vga-pci.c > @@ -106,7 +106,7 @@ static int pci_vga_initfn(PCIDevice *dev) > > /* XXX: VGA_RAM_SIZE must be a power of two */ > pci_register_bar(&d->dev, 0, VGA_RAM_SIZE, > - PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map); > + PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map); > > if (s->bios_size) { > unsigned int bios_total_size; > @@ -115,7 +115,7 @@ static int pci_vga_initfn(PCIDevice *dev) > while (bios_total_size < s->bios_size) > bios_total_size <<= 1; > pci_register_bar(&d->dev, PCI_ROM_SLOT, bios_total_size, > - PCI_ADDRESS_SPACE_MEM_PREFETCH, vga_map); > + PCI_BASE_ADDRESS_MEM_PREFETCH, vga_map); > } > return 0; > } > diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c > index e07a2a7..86766f4 100644 > --- a/hw/virtio-pci.c > +++ b/hw/virtio-pci.c > @@ -413,7 +413,7 @@ static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev, > if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) { > pci_register_bar(&proxy->pci_dev, 1, > msix_bar_size(&proxy->pci_dev), > - PCI_ADDRESS_SPACE_MEM, > + PCI_BASE_ADDRESS_SPACE_MEMORY, > msix_mmio_map); > } else > vdev->nvectors = 0; > @@ -424,7 +424,7 @@ static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev, > if (size & (size-1)) > size = 1 << qemu_fls(size); > > - pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO, > + pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO, > virtio_map); > > virtio_bind_device(vdev, &virtio_pci_bindings, proxy); > diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c > index a273f35..eb1f2f5 100644 > --- a/hw/vmware_vga.c > +++ b/hw/vmware_vga.c > @@ -1230,9 +1230,9 @@ static int pci_vmsvga_initfn(PCIDevice *dev) > s->card.config[0x3c] = 0xff; /* End */ > > pci_register_bar(&s->card, 0, 0x10, > - PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport); > + PCI_BASE_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport); > pci_register_bar(&s->card, 1, VGA_RAM_SIZE, > - PCI_ADDRESS_SPACE_MEM_PREFETCH, pci_vmsvga_map_mem); > + PCI_BASE_ADDRESS_MEM_PREFETCH, pci_vmsvga_map_mem); > > vmsvga_init(&s->chip, VGA_RAM_SIZE); > > diff --git a/hw/wdt_i6300esb.c b/hw/wdt_i6300esb.c > index 3abaa87..32e4ef3 100644 > --- a/hw/wdt_i6300esb.c > +++ b/hw/wdt_i6300esb.c > @@ -437,7 +437,7 @@ static int i6300esb_init(PCIDevice *dev) > pci_conf[0x0e] = 0x00; > > pci_register_bar(&d->dev, 0, 0x10, > - PCI_ADDRESS_SPACE_MEM, i6300esb_map); > + PCI_BASE_ADDRESS_SPACE_MEMORY, i6300esb_map); > > register_savevm("i6300esb_wdt", -1, sizeof(I6300State), > i6300esb_save, i6300esb_load, d); > -- > 1.6.0.2