From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MwvvY-0002aX-0G for qemu-devel@nongnu.org; Sun, 11 Oct 2009 06:45:24 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MwvvT-0002ZS-Pp for qemu-devel@nongnu.org; Sun, 11 Oct 2009 06:45:23 -0400 Received: from [199.232.76.173] (port=39956 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MwvvT-0002ZJ-Gy for qemu-devel@nongnu.org; Sun, 11 Oct 2009 06:45:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:64289) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MwvvS-0003Wm-PY for qemu-devel@nongnu.org; Sun, 11 Oct 2009 06:45:19 -0400 Date: Sun, 11 Oct 2009 12:43:12 +0200 From: "Michael S. Tsirkin" Message-ID: <20091011104312.GA15590@redhat.com> References: <1255069742-15724-1-git-send-email-yamahata@valinux.co.jp> <1255069742-15724-16-git-send-email-yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1255069742-15724-16-git-send-email-yamahata@valinux.co.jp> Subject: [Qemu-devel] Re: [PATCH V5 15/29] pci: typedef pcibus_t as uint64_t instead of uint32_t. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On Fri, Oct 09, 2009 at 03:28:48PM +0900, Isaku Yamahata wrote: > This patch is preliminary for 64bit bar. > For 64bit bar support, change pcibus_t which represents > pci bus addr/size from uint32_t to uint64_t. > And also change FMT_pcibus for printf. > > In pci_update_mapping() checks 32bit overflow. > So the check must be updated too. > > Signed-off-by: Isaku Yamahata That's all fine, but if you look at users implementing map io, they do: cpu_register_physical_memory() on the address they are given. And if target_phys_addr_t is 32 bit, this will silently truncate the address. So I would like to understand how this will all work on 32 bit systems. > --- > hw/pci.c | 9 ++++++++- > hw/pci.h | 4 ++-- > 2 files changed, 10 insertions(+), 3 deletions(-) > > diff --git a/hw/pci.c b/hw/pci.c > index c0ae66a..e7f8fb4 100644 > --- a/hw/pci.c > +++ b/hw/pci.c > @@ -524,7 +524,14 @@ static void pci_update_mappings(PCIDevice *d) > mappings, we handle specific values as invalid > mappings. */ > if (last_addr <= new_addr || new_addr == 0 || > - last_addr == PCI_BAR_UNMAPPED) { > + last_addr == PCI_BAR_UNMAPPED || > + > + /* Now pcibus_t is 64bit. > + * Check if 32 bit BAR wrap around explicitly. > + * Without this, PC ide doesn't work well. > + * TODO: remove this work around. > + */ > + last_addr >= UINT32_MAX) { > new_addr = PCI_BAR_UNMAPPED; > } > } else { > diff --git a/hw/pci.h b/hw/pci.h > index 8a187c2..8fbd45e 100644 > --- a/hw/pci.h > +++ b/hw/pci.h > @@ -71,8 +71,8 @@ extern target_phys_addr_t pci_mem_base; > #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 > #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 > > -typedef uint32_t pcibus_t; > -#define FMT_PCIBUS PRIx32 > +typedef uint64_t pcibus_t; > +#define FMT_PCIBUS PRIx64 > > typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, > uint32_t address, uint32_t data, int len); > -- > 1.6.0.2