From: "Michael S. Tsirkin" <mst@redhat.com>
To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] Re: [PATCH V5 15/29] pci: typedef pcibus_t as uint64_t instead of uint32_t.
Date: Wed, 14 Oct 2009 10:55:46 +0200 [thread overview]
Message-ID: <20091014085546.GA23038@redhat.com> (raw)
In-Reply-To: <20091014043549.GL2306%yamahata@valinux.co.jp>
On Wed, Oct 14, 2009 at 01:35:49PM +0900, Isaku Yamahata wrote:
> On Tue, Oct 13, 2009 at 04:39:15PM +0200, Michael S. Tsirkin wrote:
> > On Tue, Oct 13, 2009 at 10:31:33PM +0900, Isaku Yamahata wrote:
> > > On Sun, Oct 11, 2009 at 12:43:12PM +0200, Michael S. Tsirkin wrote:
> > > > On Fri, Oct 09, 2009 at 03:28:48PM +0900, Isaku Yamahata wrote:
> > > > > This patch is preliminary for 64bit bar.
> > > > > For 64bit bar support, change pcibus_t which represents
> > > > > pci bus addr/size from uint32_t to uint64_t.
> > > > > And also change FMT_pcibus for printf.
> > > > >
> > > > > In pci_update_mapping() checks 32bit overflow.
> > > > > So the check must be updated too.
> > > > >
> > > > > Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
> > > >
> > > > That's all fine, but if you look at users implementing
> > > > map io, they do: cpu_register_physical_memory()
> > > > on the address they are given. And if target_phys_addr_t is 32 bit,
> > > > this will silently truncate the address.
> > > >
> > > > So I would like to understand how this will all
> > > > work on 32 bit systems.
> > >
> > > The case is
> > > . BAR is memory 64bit and
> > > . target_phys_addr_t is 32bit and
> > > . bar is set to >4G.
> > > Hmm, the case isn't checked.
> > >
> > > It would be checked by
> > > - last_addr <= new_addr
> > > + (target_phys_addr_t)last_addr <= new_addr
> >
> > That's pretty tricky. Can we just convert everything into
> > 64 bit unconditionally and just do simple range checks?
> >
> > >
> > > I'll fix it with comments added. Nice catch.
> >
> > Is this the right thing to do though?
> > I think 32 bit CPU might address something like 64G
> > memory of highmem support, so a 64 bit value might
> > actually be valid.
> >
> > Let's step back and understand what the motivation is?
> > Maybe declaring all bars as 32 bit for 32 bit targets is enough?
>
> It is independent of guest OS for PCI device to have 64 bit BAR.
> It is valid to use PCI card with 64bit bar on 32 bit OS.
Yes, but qemu does not support this yet.
> In that case
> the OS will set the 64 bit bar within addressable region.
> And it is allowed for 32 bit OS to set 64bit BAR to >4GB.
> (which doesn't make sense, though.)
Yes, it does. E.g. with high memory, a 32 bit OS can address
more than 4G RAM.
>
> How about adding the following check?
> last_addr >= TARGET_PHYS_ADDR_MAX
And then what?
> --
> yamahata
next prev parent reply other threads:[~2009-10-14 8:58 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-10-09 6:28 [Qemu-devel] [PATCH V5 00/29] pci: various pci clean up and pci express support Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 01/29] pci: fix PCI_DPRINTF() wrt variadic macro Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 02/29] pci: introduce constant PCI_NUM_PINS for the number of interrupt pins, 4 Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 03/29] pci: use PCI_SLOT() and PCI_FUNC() Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 04/29] pci: define a constant to represent a unmapped bar and use it Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 05/29] pci: helper functions to access PCIDevice::config Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 06/29] pci: use helper functions to access pci config space Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 07/29] pci/bridge: clean up of pci_bridge_initfn() Isaku Yamahata
2009-10-09 6:53 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 13:20 ` Isaku Yamahata
2009-10-13 14:17 ` Michael S. Tsirkin
2009-10-13 15:12 ` Blue Swirl
2009-10-13 15:26 ` Michael S. Tsirkin
2009-10-13 16:32 ` Blue Swirl
2009-10-09 6:54 ` Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 08/29] pci: s/PCI_ADDRESS_SPACE_/PCI_BASE_ADDRESS_SPACE_/ to match pci_regs.h Isaku Yamahata
2009-10-09 6:57 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 13:21 ` Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 09/29] pci: clean up of pci_default_read_config Isaku Yamahata
2009-10-09 6:50 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:58 ` Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 10/29] pci: make pci_bar() aware of header type 1 Isaku Yamahata
2009-10-09 7:06 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-10 19:29 ` Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 11/29] pci_host.h: move functions in pci_host.h into .c file Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 12/29] pci_host: consolidate pci config address access Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 13/29] pci: introduce pcibus_t to represent pci bus address/size instead of uint32_t Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 14/29] pci: introduce FMT_PCIBUS for printf format for pcibus_t Isaku Yamahata
2009-10-10 19:32 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 15/29] pci: typedef pcibus_t as uint64_t instead of uint32_t Isaku Yamahata
2009-10-11 10:43 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 13:31 ` Isaku Yamahata
2009-10-13 14:39 ` Michael S. Tsirkin
2009-10-14 4:35 ` Isaku Yamahata
2009-10-14 8:55 ` Michael S. Tsirkin [this message]
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 16/29] pci: 64bit bar support Isaku Yamahata
2009-10-10 19:39 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 13:52 ` Isaku Yamahata
2009-10-13 15:00 ` Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 17/29] pci: make pci configuration transaction more accurate Isaku Yamahata
2009-10-09 12:52 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 18/29] pci: factor out the conversion logic from io port address into pci device Isaku Yamahata
2009-10-10 19:41 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 19/29] pci: split out ioport address parsing from pci configuration access logic Isaku Yamahata
2009-10-10 19:45 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 14:14 ` Isaku Yamahata
2009-10-13 14:49 ` Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 20/29] pci: move pci host stuff from pci.c to pci_host.c Isaku Yamahata
2009-10-10 19:46 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 21/29] pci_host: change the signature of pci_data_{read, write} Isaku Yamahata
2009-10-09 12:02 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 22/29] vmstate: add VMSTATE_ARRAY_POINTER for pointer to array Isaku Yamahata
2009-10-11 10:37 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 23/29] pci: pcie host and mmcfg support Isaku Yamahata
2009-10-11 10:26 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 24/29] pci: fix pci_default_write_config() Isaku Yamahata
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 25/29] pci: add helper functions for pci config write function Isaku Yamahata
2009-10-10 19:58 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:28 ` [Qemu-devel] [PATCH V5 26/29] pci: use helper function in pci_default_write_config() Isaku Yamahata
2009-10-09 6:29 ` [Qemu-devel] [PATCH V5 27/29] pci/bridge: don't update bar mapping when bar2-5 is changed Isaku Yamahata
2009-10-09 10:35 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-09 6:29 ` [Qemu-devel] [PATCH V5 28/29] pci: initialize pci config headers depending it pci header type Isaku Yamahata
2009-10-09 10:42 ` [Qemu-devel] " Michael S. Tsirkin
2009-10-13 14:31 ` Isaku Yamahata
2009-10-13 14:52 ` Michael S. Tsirkin
2009-10-13 15:06 ` Michael S. Tsirkin
2009-10-09 6:29 ` [Qemu-devel] [PATCH V5 29/29] pci/monitor: print out bridge's filtering values and so on Isaku Yamahata
2009-10-10 20:05 ` [Qemu-devel] " Michael S. Tsirkin
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