From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N3Tu1-0007Sf-Hd for qemu-devel@nongnu.org; Thu, 29 Oct 2009 08:14:53 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N3Ttx-0007Rt-Rt for qemu-devel@nongnu.org; Thu, 29 Oct 2009 08:14:53 -0400 Received: from [199.232.76.173] (port=57540 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N3Ttx-0007Rl-KY for qemu-devel@nongnu.org; Thu, 29 Oct 2009 08:14:49 -0400 Received: from mx1.redhat.com ([209.132.183.28]:29470) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N3Ttx-000775-4J for qemu-devel@nongnu.org; Thu, 29 Oct 2009 08:14:49 -0400 Date: Thu, 29 Oct 2009 14:12:22 +0200 From: "Michael S. Tsirkin" Message-ID: <20091029121221.GA3478@redhat.com> References: <4ADED9A0.3000605@gmail.com> <4AE70C35.6050909@gmail.com> <20091027151640.GH5526@csclub.uwaterloo.ca> <4AE97CBA.80600@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <4AE97CBA.80600@gmail.com> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: Re: PCI address question List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?iso-8859-1?Q?M=E0rius_Mont=F3n?= Cc: qemu-devel@nongnu.org On Thu, Oct 29, 2009 at 12:30:02PM +0100, M=E0rius Mont=F3n wrote: > Lennart Sorensen wrote: >=20 > On Tue, Oct 27, 2009 at 04:05:25PM +0100, M=E0rius Mont=F3n wrote: >=20 >=20 > M=E0rius Mont=F3n wrote: >=20 >=20 > Hello, >=20 > For my PCI device to QEMU, I need the real address the PCI = bus is using > to access my device. For a IO BAR (PCI_ADDRESS_SPACE_IO), I= receive the > real address (like 0xc200 or similar), but when registering= a > PCI_ADDRESS_SPACE_MEM I only receive the offset to the BAR. >=20 > How I can receive or obtaint the real address on each acces= s to my device? >=20 > Cjeers, >=20 > M=E0rius >=20 >=20 >=20 > nobody can tell me anything? :( >=20 >=20 > Add the offset to the address in the bar? >=20 > The problem is how to know what bar is accessing in case I have only on= e > function for all BARs. I expect that's unusual: different BARs usually have different functionality. Just implement different functions and pass calls on to a shared helper? > After all the OS is allowed to change your BAR if it wants to. > So internally the only thing that makes sense to a PCI device is th= e > offset from it's base address. >=20 > You listen to addresses at your IO range, and at your memory BAR ra= nge. > What you do when you see a request for your range then depends on t= he > offset that address had from the current base. This would also be = true > for the IO. >=20 > I know all PCI internals, but I don't understand why for IO I receive a= ll > address and only the offset for MEM BARs (or I'm wrong?) >=20 > M=E0rius PCI only calls a map method. I think this gets a 32 bit address, not BAR = offset: r->addr =3D new_addr; if (r->addr !=3D -1) { r->map_func(d, i, r->addr, r->size, r->type); } --=20 MST