Hi!

> Hi list,
>
> there's been a lot of discussion about abstraction of hardware devices
> and machine description.
>
> Last Saturday I've been running into some developers from the University
> of Erlangen (FAU) who work on an x86 emulator, used to simulate machine
> failures (memory bit flips, hard drive failures) [1].
>
> The most interesting part of their project appears to be the hardware
> abstraction layer. So in the general discussion of creating a generic
> machine description, it might be a good idea to get them to contribute
> their experience to Qemu :-). Maybe we can learn about dead ends and
> unexplored alternatives from them.
>
> FAUmachine guys, it would be awesome if you could either point us to a
> thorough documentation of the device abstraction layers or give some
> overview in a reply to this email.

Here it is...:

	http://www.faumachine.org/internals.pdf

If there are any questions feel free to ask...!

> Alex
>
> [1] http://www.faumachine.org

        Volkmar
-- 
Dr.-Ing. Volkmar Sieh            Universität Erlangen-Nürnberg
                                 Lehrstuhl für Informatik 3 (Rechnerarchitektur)
                                 Department Informatik
Tel: +49(0)9131/8527911          Martensstr. 3
Fax: +49(0)9131/8527239          D-91058 Erlangen
sieh@informatik.uni-erlangen.de  Germany