From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N8Cp0-0000Ey-CZ for qemu-devel@nongnu.org; Wed, 11 Nov 2009 08:01:14 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N8Cov-0000AD-JO for qemu-devel@nongnu.org; Wed, 11 Nov 2009 08:01:13 -0500 Received: from [199.232.76.173] (port=38254 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N8Cou-00009m-Tw for qemu-devel@nongnu.org; Wed, 11 Nov 2009 08:01:09 -0500 Received: from mx20.gnu.org ([199.232.41.8]:28789) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1N8Cot-0004qF-GN for qemu-devel@nongnu.org; Wed, 11 Nov 2009 08:01:07 -0500 Received: from mail.codesourcery.com ([38.113.113.100]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N8Cos-0007HI-4S for qemu-devel@nongnu.org; Wed, 11 Nov 2009 08:01:06 -0500 From: Paul Brook Date: Wed, 11 Nov 2009 13:01:03 +0000 References: <20091026131715.GA25271@redhat.com> <200911110134.13064.paul@codesourcery.com> <20091111093737.GA3276@redhat.com> In-Reply-To: <20091111093737.GA3276@redhat.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <200911111301.03427.paul@codesourcery.com> Subject: [Qemu-devel] Re: [PATCH] qemu/virtio: make wmb compiler barrier + comments List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: qemu-devel@nongnu.org On Wednesday 11 November 2009, Michael S. Tsirkin wrote: > On Wed, Nov 11, 2009 at 01:34:12AM +0000, Paul Brook wrote: > > On Monday 26 October 2009, Michael S. Tsirkin wrote: > > > wmb must be at least a compiler barrier, even without SMP. > > > > Why? > > Because virtio code might run on a separate thread from guest. > If compiler reorders writes, guest might see inconsistent data. If you've got threads running in parallel (which may be running on separate CPUs) then you need an actual memory barrier to prevent the hardware reordering things behind your back. If you've already used locking to avoid simultaneous execution then the locking routines already include memory barriers. A "compiler memory barrier" provides absolutely no guarantees in a multithreaded environment. They are sometimes useful in a single threaded interruptable system (i.e. UNIX signals), but that's definitely not the case here. Paul