From: Jamie Lokier <jamie@shareable.org>
To: Artyom Tarasenko <atar4qemu@googlemail.com>
Cc: Blue Swirl <blauwirbel@gmail.com>, qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] Re: [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix
Date: Mon, 16 Nov 2009 22:35:21 +0000 [thread overview]
Message-ID: <20091116223521.GC12063@shareable.org> (raw)
In-Reply-To: <fb8d4f70911160919y3ba2725dn61e150459c5bef36@mail.gmail.com>
Artyom Tarasenko wrote:
> I don't know, how the real sun4m reacts in the case where irq stays
> on, not being cleared.
> It can not be though that it would try to process irq for every next
> tick. The CPU must have some time to clear the pending irq, so it must
> be edge triggered too, at least in a way.
In general, most CPUs have a "disable interrupts" flag which is set at
the same time as calling the irq handler.
That's enough, even if everything about interrupts is level triggered,
so you can't assume anything is edge triggered just from that alone.
However if a CPU doesn't have an "disable interrupts" flag, then of
course the triggering must be edge triggered somewhere.
-- Jamie
next prev parent reply other threads:[~2009-11-16 22:35 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-11-14 1:03 [Qemu-devel] [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix Artyom Tarasenko
2009-11-14 15:26 ` [Qemu-devel] " Blue Swirl
2009-11-14 23:15 ` Artyom Tarasenko
2009-11-15 22:13 ` Blue Swirl
2009-11-16 11:47 ` Artyom Tarasenko
2009-11-16 16:14 ` Blue Swirl
2009-11-16 17:19 ` Artyom Tarasenko
2009-11-16 21:53 ` Blue Swirl
2009-11-16 22:31 ` Jamie Lokier
2009-11-16 22:50 ` Artyom Tarasenko
2009-11-16 22:35 ` Jamie Lokier [this message]
2009-11-16 22:44 ` Artyom Tarasenko
2009-11-17 20:45 ` Blue Swirl
2010-01-15 22:37 ` Artyom Tarasenko
2009-11-16 16:45 ` Artyom Tarasenko
2009-11-16 22:27 ` Jamie Lokier
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