From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NAAAS-0000oD-Rn for qemu-devel@nongnu.org; Mon, 16 Nov 2009 17:35:28 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NAAAN-0000lt-Uw for qemu-devel@nongnu.org; Mon, 16 Nov 2009 17:35:28 -0500 Received: from [199.232.76.173] (port=48168 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NAAAN-0000lf-HT for qemu-devel@nongnu.org; Mon, 16 Nov 2009 17:35:23 -0500 Received: from mail2.shareable.org ([80.68.89.115]:36938) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NAAAN-0003N0-28 for qemu-devel@nongnu.org; Mon, 16 Nov 2009 17:35:23 -0500 Date: Mon, 16 Nov 2009 22:35:21 +0000 From: Jamie Lokier Subject: Re: [Qemu-devel] Re: [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix Message-ID: <20091116223521.GC12063@shareable.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: Blue Swirl , qemu-devel Artyom Tarasenko wrote: > I don't know, how the real sun4m reacts in the case where irq stays > on, not being cleared. > It can not be though that it would try to process irq for every next > tick. The CPU must have some time to clear the pending irq, so it must > be edge triggered too, at least in a way. In general, most CPUs have a "disable interrupts" flag which is set at the same time as calling the irq handler. That's enough, even if everything about interrupts is level triggered, so you can't assume anything is edge triggered just from that alone. However if a CPU doesn't have an "disable interrupts" flag, then of course the triggering must be edge triggered somewhere. -- Jamie