From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NDLF4-00045s-HG for qemu-devel@nongnu.org; Wed, 25 Nov 2009 12:01:22 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NDLEz-00044f-BJ for qemu-devel@nongnu.org; Wed, 25 Nov 2009 12:01:21 -0500 Received: from [199.232.76.173] (port=42645 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NDLEz-00044b-5Q for qemu-devel@nongnu.org; Wed, 25 Nov 2009 12:01:17 -0500 Received: from mx1.redhat.com ([209.132.183.28]:20693) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NDLEy-0003sU-H2 for qemu-devel@nongnu.org; Wed, 25 Nov 2009 12:01:16 -0500 Date: Wed, 25 Nov 2009 18:58:34 +0200 From: "Michael S. Tsirkin" Message-ID: <20091125165834.GA24783@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH 0/4] pci: interrupt status/interrupt disable support List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, anthony@codemonkey.ws, yamahata@valinux.co.jp This patchset adds support for mandatory interupt status and interrupt disable bits to all PCI devices. This is required for PCI compliancy. These patches are on top of my pci tree, including Isaku Yamahata's fixes. If this is a problem, let me know and I will rebase. This works fine for me, but since this touches all PCI devices, please review carefully. Michael S. Tsirkin (4): pci: rearrange code for interrupts pci: track IRQ status pci: interrupt status bit implementation pci: interrupt disable bit support hw/pci.c | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++--------- hw/pci.h | 8 ++++++ 2 files changed, 79 insertions(+), 12 deletions(-)