From: Jamie Lokier <jamie@shareable.org>
To: Clemens Kolbitsch <ck@iseclab.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] i386 emulation bug: mov reg, [addr]
Date: Tue, 15 Dec 2009 21:26:57 +0000 [thread overview]
Message-ID: <20091215212657.GC26319@shareable.org> (raw)
In-Reply-To: <200912151948.53307.ck@iseclab.org>
Clemens Kolbitsch wrote:
> /* XXX: index == 4 is always invalid */
> if (havesib && (index != 4 || scale != 0)) {
> #ifdef TARGET_X86_64
> if (s->aflag == 2) {
> gen_op_addq_A0_reg_sN(scale, index);
> } else
> #endif
> {
> /// !!!!!!!!!! this does the evil !!!!!!!!!!!!!!
> gen_op_addl_A0_reg_sN(scale, index);
> }
> }
This is indeed a bug. Avi's explained why it doesn't trigger in
normal code.
When the index register is 4, which normally means %esp, in the SIB
encoding it means "no index". Independent of the shift (scale).
So it should say:
/* index == 4 means no index. */
if (havesib && index != 4) {
But that said, I'm not sure if this line from earlier breaks the test:
index = ((code >> 3) & 7) | REX_X(s);
When is REX_X(s) not zero, and does it break the index != 4 test?
-- Jamie
next prev parent reply other threads:[~2009-12-15 21:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-15 18:48 [Qemu-devel] i386 emulation bug: mov reg, [addr] Clemens Kolbitsch
2009-12-15 19:54 ` Avi Kivity
2009-12-15 21:21 ` Jamie Lokier
2009-12-16 8:56 ` Clemens Kolbitsch
2009-12-16 9:05 ` Avi Kivity
2009-12-16 9:28 ` [Qemu-devel] " Paolo Bonzini
2009-12-15 21:26 ` Jamie Lokier [this message]
2009-12-15 22:24 ` [Qemu-devel] " malc
2009-12-15 23:37 ` [Qemu-devel] " Paolo Bonzini
2009-12-16 10:07 ` [Qemu-devel] " Avi Kivity
2010-03-06 17:02 ` Aurelien Jarno
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