From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NNCrm-0005hz-MQ for qemu-devel@nongnu.org; Tue, 22 Dec 2009 17:06:06 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NNCrh-0005f9-3T for qemu-devel@nongnu.org; Tue, 22 Dec 2009 17:06:05 -0500 Received: from [199.232.76.173] (port=45611 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NNCrh-0005f6-1W for qemu-devel@nongnu.org; Tue, 22 Dec 2009 17:06:01 -0500 Received: from mail2.shareable.org ([80.68.89.115]:34049) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NNCrg-0002VH-Nn for qemu-devel@nongnu.org; Tue, 22 Dec 2009 17:06:00 -0500 Date: Tue, 22 Dec 2009 22:05:56 +0000 From: Jamie Lokier Subject: Re: [Qemu-devel] [PATCH V4 03/18] target-i386: support a20 mask for NEC PC-9812 Message-ID: <20091222220556.GA19806@shareable.org> References: <200912221740.AA00206@YOUR-BD18D6DD63.m1.interq.or.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <200912221740.AA00206@YOUR-BD18D6DD63.m1.interq.or.jp> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "TAKEDA, toshiya" Cc: qemu-devel TAKEDA, toshiya wrote: > @@ -940,7 +966,15 @@ void cpu_x86_set_a20(CPUX86State *env, int a20_state) > /* when a20 is changed, all the MMU mappings are invalid, so > we must flush everything */ > tlb_flush(env, 1); > - env->a20_mask = ~(1 << 20) | (a20_state << 20); > + if (env->private_features & PRIVATE_FEATURE_PC98_A20MASK) { > + if (a20_state) { > + env->a20_mask = ~0x0; > + } else { > + env->a20_mask = 0xfffff; > + } > + } else { > + env->a20_mask = ~(1 << 20) | (a20_state << 20); > + } > } > } It seems strange to mix different styles in that way. How about this, which I think makes the PC98 vs. PC difference clearer too: if (a20_state) { env->a20_mask = ~0x0; } else if (env->private_features & PRIVATE_FEATURE_PC98_A20MASK) { env->a20_mask = (1 << 20) - 1; /* A20 masks all bits >= 20. */ } else { env->a20_mask = ~(1 << 20); /* A20 masks only bit 20. */ } (When I say clearer, it's not _that_ obvious that these or the original expressions store the right thing into "uint64 env->a20_mask", given these expressions are all of type "int", but, in fact, they do owing to C type promotion rules. Same for the save/load state). -- Jamie