From: "Igor V. Kovalenko" <igor.v.kovalenko@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 7/9] sparc64: move cpu_interrupts_enabled to cpu.h
Date: Thu, 07 Jan 2010 23:28:26 +0300 [thread overview]
Message-ID: <20100107202826.16653.73812.stgit@skyserv> (raw)
In-Reply-To: <20100107201810.16653.85771.stgit@skyserv>
From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
- to be used by cpu_check_irqs
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
---
target-sparc/cpu.h | 13 +++++++++++++
target-sparc/exec.h | 13 -------------
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 0f0e38c..e5b282d 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -564,6 +564,19 @@ static inline int cpu_mmu_index(CPUState *env1)
#endif
}
+static inline int cpu_interrupts_enabled(CPUState *env1)
+{
+#if !defined (TARGET_SPARC64)
+ if (env1->psret != 0)
+ return 1;
+#else
+ if (env1->pstate & PS_IE)
+ return 1;
+#endif
+
+ return 0;
+}
+
static inline int cpu_fpu_enabled(CPUState *env1)
{
#if defined(CONFIG_USER_ONLY)
diff --git a/target-sparc/exec.h b/target-sparc/exec.h
index e120d6f..3e021e9 100644
--- a/target-sparc/exec.h
+++ b/target-sparc/exec.h
@@ -24,19 +24,6 @@ static inline void regs_to_env(void)
/* op_helper.c */
void do_interrupt(CPUState *env);
-static inline int cpu_interrupts_enabled(CPUState *env1)
-{
-#if !defined (TARGET_SPARC64)
- if (env1->psret != 0)
- return 1;
-#else
- if (env1->pstate & PS_IE)
- return 1;
-#endif
-
- return 0;
-}
-
static inline int cpu_has_work(CPUState *env1)
{
return (env1->interrupt_request & CPU_INTERRUPT_HARD) &&
next prev parent reply other threads:[~2010-01-07 20:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-07 20:27 [Qemu-devel] [PATCH 0/9] sparc64: interrupts and tick timers v1 Igor V. Kovalenko
2010-01-07 20:27 ` [Qemu-devel] [PATCH 1/9] sparc64: change_pstate should have 32bit argument Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 2/9] sparc64: trace pstate and global register set changes Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 3/9] sparc64: add PIL to cpu state dump Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 4/9] sparc64: use helper_wrpil to check pending irq on write Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 5/9] sparc64: check for pending irq when pil, pstate or softint is changed Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 6/9] sparc64: add macros to deal with softint and timer interrupt Igor V. Kovalenko
2010-01-07 20:28 ` Igor V. Kovalenko [this message]
2010-01-07 20:28 ` [Qemu-devel] [PATCH 8/9] sparc64: interrupt trap handling Igor V. Kovalenko
2010-01-07 20:28 ` [Qemu-devel] [PATCH 9/9] sparc64: reimplement tick timers Igor V. Kovalenko
2010-01-08 18:16 ` [Qemu-devel] [PATCH 0/9] sparc64: interrupts and tick timers v1 Blue Swirl
-- strict thread matches above, loose matches on Subject: below --
2010-01-05 23:19 [Qemu-devel] [PATCH 0/9] sparc64: tick timers Igor V. Kovalenko
2010-01-05 23:19 ` [Qemu-devel] [PATCH 7/9] sparc64: move cpu_interrupts_enabled to cpu.h Igor V. Kovalenko
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