[Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Luiz Capitulino]

 Hi,

 This new version addresses Markus's comments.

changelog
---------

V1 -> V2

- Make class_info's key 'desc' optional
- Better indentation
- Doc fixes

V0 -> V1

- Coding style fixes
- Make 'BAR' and 'IRQ' keys lowercase
- Add 'irq' key to the documentation

 Thanks.

[Qemu-devel] [PATCH 1/5] QList: Introduce QLIST_FOREACH_ENTRY()

[Luiz Capitulino]

Iterate over QList entries, it's needed to call qlist_entry_obj()
to retrieve the stored QObject.

I'm not sure if it's ok to have this, because it's not as easy as
qlist_iter() and the QListEntry data type is now exposed to the
users, which means we have one more struct to be maintained when
we have libqmp.

Adding anyway, as it's more compact and people are asking for it.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 qlist.h |   10 ++++++++++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/qlist.h b/qlist.h
index afdc446..a3261e1 100644
--- a/qlist.h
+++ b/qlist.h
@@ -29,6 +29,16 @@ typedef struct QList {
 #define qlist_append(qlist, obj) \
         qlist_append_obj(qlist, QOBJECT(obj))
 
+#define QLIST_FOREACH_ENTRY(qlist, var)             \
+        for ((var) = ((qlist)->head.tqh_first);     \
+            (var);                                  \
+            (var) = ((var)->next.tqe_next))
+
+static inline QObject *qlist_entry_obj(const QListEntry *entry)
+{
+    return entry->value;
+}
+
 QList *qlist_new(void);
 QList *qlist_copy(QList *src);
 void qlist_append_obj(QList *qlist, QObject *obj);
-- 
1.6.6

[Qemu-devel] [PATCH 2/5] QDict: Introduce qdict_get_qdict()

[Luiz Capitulino]

A helper to retrieve a QDict from a QDict.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 qdict.c |   13 +++++++++++++
 qdict.h |    1 +
 2 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/qdict.c b/qdict.c
index ba8eef0..c6a5a42 100644
--- a/qdict.c
+++ b/qdict.c
@@ -216,6 +216,19 @@ QList *qdict_get_qlist(const QDict *qdict, const char *key)
 }
 
 /**
+ * qdict_get_qdict(): Get the QDict mapped by 'key'
+ *
+ * This function assumes that 'key' exists and it stores a
+ * QDict object.
+ *
+ * Return QDict mapped by 'key'.
+ */
+QDict *qdict_get_qdict(const QDict *qdict, const char *key)
+{
+    return qobject_to_qdict(qdict_get_obj(qdict, key, QTYPE_QDICT));
+}
+
+/**
  * qdict_get_str(): Get a pointer to the stored string mapped
  * by 'key'
  *
diff --git a/qdict.h b/qdict.h
index 5fef1ea..2eaf6d5 100644
--- a/qdict.h
+++ b/qdict.h
@@ -40,6 +40,7 @@ void qdict_iter(const QDict *qdict,
 int64_t qdict_get_int(const QDict *qdict, const char *key);
 int qdict_get_bool(const QDict *qdict, const char *key);
 QList *qdict_get_qlist(const QDict *qdict, const char *key);
+QDict *qdict_get_qdict(const QDict *qdict, const char *key);
 const char *qdict_get_str(const QDict *qdict, const char *key);
 int64_t qdict_get_try_int(const QDict *qdict, const char *key,
                           int64_t err_value);
-- 
1.6.6

[Qemu-devel] [PATCH 3/5] PCI: Convert pci_info() to QObject

[Luiz Capitulino]

The returned QObject is a QList of all buses. Each bus is
represented by a QDict, which has a key with a QList of all
PCI devices attached to it. Each device is represented by
a QDict.

IMPORTANT: support for printing PCI bridge information and
its devices is NOT part of this commit, it's going to be
added by next commits.

Finally, as has happended to other complex conversions,
it's hard to split this commit as part of it are new
functions which are called by each other.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 hw/pci.c  |  316 +++++++++++++++++++++++++++++++++++++++++++++----------------
 hw/pci.h  |    4 +-
 monitor.c |    3 +-
 3 files changed, 240 insertions(+), 83 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index 2bdf27e..3d0af69 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -27,6 +27,7 @@
 #include "net.h"
 #include "sysemu.h"
 #include "loader.h"
+#include "qemu-objects.h"
 
 //#define DEBUG_PCI
 #ifdef DEBUG_PCI
@@ -1076,119 +1077,272 @@ static const pci_class_desc pci_class_descriptions[] =
     { 0, NULL}
 };
 
-static void pci_info_device(PCIBus *bus, PCIDevice *d)
+static void pci_for_each_device_under_bus(PCIBus *bus,
+                                          void (*fn)(PCIBus *b, PCIDevice *d))
 {
-    Monitor *mon = cur_mon;
-    int i, class;
-    PCIIORegion *r;
-    const pci_class_desc *desc;
+    PCIDevice *d;
+    int devfn;
 
-    monitor_printf(mon, "  Bus %2d, device %3d, function %d:\n",
-                   pci_bus_num(d->bus),
-                   PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
-    class = pci_get_word(d->config + PCI_CLASS_DEVICE);
+    for(devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+        d = bus->devices[devfn];
+        if (d) {
+            fn(bus, d);
+        }
+    }
+}
+
+void pci_for_each_device(PCIBus *bus, int bus_num,
+                         void (*fn)(PCIBus *b, PCIDevice *d))
+{
+    bus = pci_find_bus(bus, bus_num);
+
+    if (bus) {
+        pci_for_each_device_under_bus(bus, fn);
+    }
+}
+
+static void pci_device_print(Monitor *mon, QDict *device)
+{
+    QDict *qdict;
+    QListEntry *entry;
+    uint64_t addr, size;
+
+    monitor_printf(mon, "  Bus %2" PRId64 ", ", qdict_get_int(device, "bus"));
+    monitor_printf(mon, "device %3" PRId64 ", function %" PRId64 ":\n",
+                        qdict_get_int(device, "slot"),
+                        qdict_get_int(device, "function"));
     monitor_printf(mon, "    ");
+
+    qdict = qdict_get_qdict(device, "class_info");
+    if (qdict_haskey(qdict, "desc")) {
+        monitor_printf(mon, "%s", qdict_get_str(qdict, "desc"));
+    } else {
+        monitor_printf(mon, "Class %04" PRId64, qdict_get_int(qdict, "class"));
+    }
+
+    qdict = qdict_get_qdict(device, "id");
+    monitor_printf(mon, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n",
+                        qdict_get_int(qdict, "device"),
+                        qdict_get_int(qdict, "vendor"));
+
+    if (qdict_haskey(device, "irq")) {
+        monitor_printf(mon, "      IRQ %" PRId64 ".\n",
+                            qdict_get_int(device, "irq"));
+    }
+
+    /* TODO: PCI bridge info */
+
+    QLIST_FOREACH_ENTRY(qdict_get_qlist(device, "regions"), entry) {
+        qdict = qobject_to_qdict(qlist_entry_obj(entry));
+        monitor_printf(mon, "      BAR%d: ", (int) qdict_get_int(qdict, "bar"));
+
+        addr = qdict_get_int(qdict, "address");
+        size = qdict_get_int(qdict, "size");
+
+        if (!strcmp(qdict_get_str(qdict, "type"), "io")) {
+            monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS
+                                " [0x%04"FMT_PCIBUS"].\n",
+                                addr, addr + size - 1);
+        } else {
+            monitor_printf(mon, "%d bit%s memory at 0x%08"FMT_PCIBUS
+                               " [0x%08"FMT_PCIBUS"].\n",
+                                qdict_get_bool(qdict, "mem_type_64") ? 64 : 32,
+                                qdict_get_bool(qdict, "prefetch") ?
+                                " prefetchable" : "", addr, addr + size - 1);
+        }
+    }
+
+    monitor_printf(mon, "      id \"%s\"\n", qdict_get_str(device, "qdev_id"));
+
+    /* TODO: PCI bridge devices */
+}
+
+void do_pci_info_print(Monitor *mon, const QObject *data)
+{
+    QListEntry *bus, *dev;
+
+    QLIST_FOREACH_ENTRY(qobject_to_qlist(data), bus) {
+        QDict *qdict = qobject_to_qdict(qlist_entry_obj(bus));
+        QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
+            pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev)));
+        }
+    }
+}
+
+static QObject *pci_get_dev_class(const PCIDevice *dev)
+{
+    int class;
+    const pci_class_desc *desc;
+
+    class = pci_get_word(dev->config + PCI_CLASS_DEVICE);
     desc = pci_class_descriptions;
     while (desc->desc && class != desc->class)
         desc++;
+
     if (desc->desc) {
-        monitor_printf(mon, "%s", desc->desc);
+        return qobject_from_jsonf("{ 'desc': %s, 'class': %d }",
+                                  desc->desc, class);
     } else {
-        monitor_printf(mon, "Class %04x", class);
-    }
-    monitor_printf(mon, ": PCI device %04x:%04x\n",
-           pci_get_word(d->config + PCI_VENDOR_ID),
-           pci_get_word(d->config + PCI_DEVICE_ID));
-
-    if (d->config[PCI_INTERRUPT_PIN] != 0) {
-        monitor_printf(mon, "      IRQ %d.\n",
-                       d->config[PCI_INTERRUPT_LINE]);
-    }
-    if (class == 0x0604) {
-        uint64_t base;
-        uint64_t limit;
-
-        monitor_printf(mon, "      BUS %d.\n", d->config[0x19]);
-        monitor_printf(mon, "      secondary bus %d.\n",
-                       d->config[PCI_SECONDARY_BUS]);
-        monitor_printf(mon, "      subordinate bus %d.\n",
-                       d->config[PCI_SUBORDINATE_BUS]);
-
-        base = pci_bridge_get_base(d, PCI_BASE_ADDRESS_SPACE_IO);
-        limit = pci_bridge_get_limit(d, PCI_BASE_ADDRESS_SPACE_IO);
-        monitor_printf(mon, "      IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
-                       base, limit);
-
-        base = pci_bridge_get_base(d, PCI_BASE_ADDRESS_SPACE_MEMORY);
-        limit= pci_bridge_get_limit(d, PCI_BASE_ADDRESS_SPACE_MEMORY);
-        monitor_printf(mon,
-                       "      memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
-                       base, limit);
-
-        base = pci_bridge_get_base(d, PCI_BASE_ADDRESS_SPACE_MEMORY |
-                                   PCI_BASE_ADDRESS_MEM_PREFETCH);
-        limit = pci_bridge_get_limit(d, PCI_BASE_ADDRESS_SPACE_MEMORY |
-                                     PCI_BASE_ADDRESS_MEM_PREFETCH);
-        monitor_printf(mon, "      prefetchable memory range "
-                       "[0x%08"PRIx64", 0x%08"PRIx64"]\n", base, limit);
-    }
-    for(i = 0;i < PCI_NUM_REGIONS; i++) {
-        r = &d->io_regions[i];
-        if (r->size != 0) {
-            monitor_printf(mon, "      BAR%d: ", i);
-            if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
-                monitor_printf(mon, "I/O at 0x%04"FMT_PCIBUS
-                               " [0x%04"FMT_PCIBUS"].\n",
-                               r->addr, r->addr + r->size - 1);
-            } else {
-                const char *type = r->type & PCI_BASE_ADDRESS_MEM_TYPE_64 ?
-                    "64 bit" : "32 bit";
-                const char *prefetch =
-                    r->type & PCI_BASE_ADDRESS_MEM_PREFETCH ?
-                    " prefetchable" : "";
+        return qobject_from_jsonf("{ 'class': %d }", class);
+    }
+}
 
-                monitor_printf(mon, "%s%s memory at 0x%08"FMT_PCIBUS
-                               " [0x%08"FMT_PCIBUS"].\n",
-                               type, prefetch,
-                               r->addr, r->addr + r->size - 1);
-            }
+static QObject *pci_get_dev_id(const PCIDevice *dev)
+{
+    return qobject_from_jsonf("{ 'device': %d, 'vendor': %d }",
+                              pci_get_word(dev->config + PCI_VENDOR_ID),
+                              pci_get_word(dev->config + PCI_DEVICE_ID));
+}
+
+static QObject *pci_get_regions_list(const PCIDevice *dev)
+{
+    int i;
+    QList *regions_list;
+
+    regions_list = qlist_new();
+
+    for (i = 0; i < PCI_NUM_REGIONS; i++) {
+        QObject *obj;
+        const PCIIORegion *r = &dev->io_regions[i];
+
+        if (!r->size) {
+            continue;
+        }
+
+        if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
+            obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'io', "
+                                     "'address': %" PRId64 ", "
+                                     "'size': %" PRId64 " }",
+                                     i, r->addr, r->size);
+        } else {
+            int mem_type_64 = r->type & PCI_BASE_ADDRESS_MEM_TYPE_64;
+
+            obj = qobject_from_jsonf("{ 'bar': %d, 'type': 'memory', "
+                                     "'mem_type_64': %i, 'prefetch': %i, "
+                                     "'address': %" PRId64 ", "
+                                     "'size': %" PRId64 " }",
+                                     i, mem_type_64,
+                                     r->type & PCI_BASE_ADDRESS_MEM_PREFETCH,
+                                     r->addr, r->size);
         }
+
+        qlist_append_obj(regions_list, obj);
     }
-    monitor_printf(mon, "      id \"%s\"\n", d->qdev.id ? d->qdev.id : "");
-    if (class == 0x0604 && d->config[0x19] != 0) {
-        pci_for_each_device(bus, d->config[0x19], pci_info_device);
+
+    return QOBJECT(regions_list);
+}
+
+static QObject *pci_get_dev_dict(const PCIDevice *dev, int bus_num)
+{
+    QObject *obj;
+
+    obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d,"                                       "'class_info': %p, 'id': %p, 'regions': %p,"
+                              " 'qdev_id': %s }",
+                              bus_num,
+                              PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
+                              pci_get_dev_class(dev), pci_get_dev_id(dev),
+                              pci_get_regions_list(dev),
+                              dev->qdev.id ? dev->qdev.id : "");
+
+    if (dev->config[PCI_INTERRUPT_PIN] != 0) {
+        QDict *qdict = qobject_to_qdict(obj);
+        qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
     }
+
+    return obj;
 }
 
-static void pci_for_each_device_under_bus(PCIBus *bus,
-                                          void (*fn)(PCIBus *b, PCIDevice *d))
+static QObject *pci_get_devices_list(PCIBus *bus, int bus_num)
 {
-    PCIDevice *d;
     int devfn;
+    PCIDevice *dev;
+    QList *dev_list;
 
-    for(devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
-        d = bus->devices[devfn];
-        if (d)
-            fn(bus, d);
+    dev_list = qlist_new();
+
+    for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
+        dev = bus->devices[devfn];
+        if (dev) {
+            qlist_append_obj(dev_list, pci_get_dev_dict(dev, bus_num));
+        }
     }
+
+    return QOBJECT(dev_list);
 }
 
-void pci_for_each_device(PCIBus *bus, int bus_num,
-                         void (*fn)(PCIBus *b, PCIDevice *d))
+static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num)
 {
     bus = pci_find_bus(bus, bus_num);
-
     if (bus) {
-        pci_for_each_device_under_bus(bus, fn);
+        return qobject_from_jsonf("{ 'bus': %d, 'devices': %p }",
+                                  bus_num, pci_get_devices_list(bus, bus_num));
     }
+
+    return NULL;
 }
 
-void pci_info(Monitor *mon)
+/**
+ * do_pci_info(): PCI buses and devices information
+ *
+ * The returned QObject is a QList of all buses. Each bus is
+ * represented by a QDict, which has a key with a QList of all
+ * PCI devices attached to it. Each device is represented by
+ * a QDict.
+ *
+ * The bus QDict contains the following:
+ *
+ * - "bus": bus number
+ * - "devices": a QList of QDicts, each QDict represents a PCI
+ *   device
+ *
+ * The PCI device QDict contains the following:
+ *
+ * - "bus": identical to the parent's bus number
+ * - "slot": slot number
+ * - "function": function number
+ * - "class_info": a QDict containing:
+ *      - "desc": device class description (optional)
+ *      - "class": device class number
+ * - "id": a QDict containing:
+ *      - "device": device ID
+ *      - "vendor": vendor ID
+ * - "irq": device's IRQ if assigned (optional)
+ * - "qdev_id": qdev id string
+ * - "regions": a QList of QDicts, each QDict represents a
+ *   memory region of this device
+ *
+ * The region QDict can be an I/O region or a memory region,
+ * an I/O region QDict contains the following:
+ *
+ * - "type": "io"
+ * - "bar": BAR number
+ * - "address": memory address
+ * - "size": memory size
+ *
+ * A memory region QDict contains the following:
+ *
+ * - "type": "memory"
+ * - "bar": BAR number
+ * - "address": memory address
+ * - "size": memory size
+ * - "mem_type_64": true or false
+ * - "prefetch": true or false
+ */
+void do_pci_info(Monitor *mon, QObject **ret_data)
 {
+    QList *bus_list;
     struct PCIHostBus *host;
+
+    bus_list = qlist_new();
+
     QLIST_FOREACH(host, &host_buses, next) {
-        pci_for_each_device(host->bus, 0, pci_info_device);
+        QObject *obj = pci_get_bus_dict(host->bus, 0);
+        if (obj) {
+            qlist_append_obj(bus_list, obj);
+        }
     }
+
+    *ret_data = QOBJECT(bus_list);
 }
 
 static const char * const pci_nic_models[] = {
diff --git a/hw/pci.h b/hw/pci.h
index c9ee07b..8b511d2 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -2,6 +2,7 @@
 #define QEMU_PCI_H
 
 #include "qemu-common.h"
+#include "qobject.h"
 
 #include "qdev.h"
 
@@ -234,7 +235,8 @@ PCIBus *pci_get_bus_devfn(int *devfnp, const char *devaddr);
 int pci_read_devaddr(Monitor *mon, const char *addr, int *domp, int *busp,
                      unsigned *slotp);
 
-void pci_info(Monitor *mon);
+void do_pci_info_print(Monitor *mon, const QObject *data);
+void do_pci_info(Monitor *mon, QObject **ret_data);
 PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
                         pci_map_irq_fn map_irq, const char *name);
 PCIDevice *pci_bridge_get_device(PCIBus *bus);
diff --git a/monitor.c b/monitor.c
index cadf422..0e92b4f 100644
--- a/monitor.c
+++ b/monitor.c
@@ -2447,7 +2447,8 @@ static const mon_cmd_t info_cmds[] = {
         .args_type  = "",
         .params     = "",
         .help       = "show PCI info",
-        .mhandler.info = pci_info,
+        .user_print = do_pci_info_print,
+        .mhandler.info_new = do_pci_info,
     },
 #if defined(TARGET_I386) || defined(TARGET_SH4)
     {
-- 
1.6.6

[Qemu-devel] [PATCH 4/5] PCI: do_pci_info(): PCI bridge support

[Luiz Capitulino]

This commit adds the "pci_bridge" key to the PCI device QDict,
it also adds support for printing it in the user protocol.

IMPORTANT: This code is being added separately because I could
NOT test it properly. According to Michael Tsirkin, it depends
on ultrasparc and it would take time to do the proper setup.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 hw/pci.c |   72 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 70 insertions(+), 2 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index 3d0af69..ffe4cfe 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1130,7 +1130,36 @@ static void pci_device_print(Monitor *mon, QDict *device)
                             qdict_get_int(device, "irq"));
     }
 
-    /* TODO: PCI bridge info */
+    if (qdict_haskey(device, "pci_bridge")) {
+        QDict *info;
+
+        qdict = qdict_get_qdict(device, "pci_bridge");
+
+        info = qdict_get_qdict(qdict, "bus");
+        monitor_printf(mon, "      BUS %" PRId64 ".\n",
+                            qdict_get_int(info, "number"));
+        monitor_printf(mon, "      secondary bus %" PRId64 ".\n",
+                            qdict_get_int(info, "secondary"));
+        monitor_printf(mon, "      subordinate bus %" PRId64 ".\n",
+                            qdict_get_int(info, "subordinate"));
+
+        info = qdict_get_qdict(qdict, "io_range");
+        monitor_printf(mon, "      IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+                       qdict_get_int(info, "limit"));
+
+        info = qdict_get_qdict(qdict, "memory_range");
+        monitor_printf(mon,
+                       "      memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+                       qdict_get_int(info, "limit"));
+
+        info = qdict_get_qdict(qdict, "prefetchable_range");
+        monitor_printf(mon, "      prefetchable memory range "
+                       "[0x%08"PRIx64", 0x%08"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+        qdict_get_int(info, "limit"));
+    }
 
     QLIST_FOREACH_ENTRY(qdict_get_qlist(device, "regions"), entry) {
         qdict = qobject_to_qdict(qlist_entry_obj(entry));
@@ -1232,8 +1261,9 @@ static QObject *pci_get_regions_list(const PCIDevice *dev)
     return QOBJECT(regions_list);
 }
 
-static QObject *pci_get_dev_dict(const PCIDevice *dev, int bus_num)
+static QObject *pci_get_dev_dict(PCIDevice *dev, int bus_num)
 {
+    int class;
     QObject *obj;
 
     obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d,"                                       "'class_info': %p, 'id': %p, 'regions': %p,"
@@ -1249,6 +1279,31 @@ static QObject *pci_get_dev_dict(const PCIDevice *dev, int bus_num)
         qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
     }
 
+    class = pci_get_word(dev->config + PCI_CLASS_DEVICE);
+    if (class == 0x0604) {
+        QDict *qdict;
+        QObject *pci_bridge;
+
+        pci_bridge = qobject_from_jsonf("{ 'bus': "
+        "{ 'number': %d, 'secondary': %d, 'subordinate': %d }, "
+        "'io_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
+        "'memory_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
+        "'prefetchable_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "} }",
+        dev->config[0x19], dev->config[PCI_SECONDARY_BUS],
+        dev->config[PCI_SUBORDINATE_BUS],
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO),
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
+                               PCI_BASE_ADDRESS_MEM_PREFETCH),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
+                                PCI_BASE_ADDRESS_MEM_PREFETCH));
+
+        qdict = qobject_to_qdict(obj);
+        qdict_put_obj(qdict, "pci_bridge", pci_bridge);
+    }
+
     return obj;
 }
 
@@ -1308,9 +1363,22 @@ static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num)
  *      - "vendor": vendor ID
  * - "irq": device's IRQ if assigned (optional)
  * - "qdev_id": qdev id string
+ * - "pci_bridge": It's a QDict, only present if this device is a
+ *   PCI bridge, contains:
+ *      - "bus": bus number
+ *      - "secondary": secondary bus number
+ *      - "subordinate": subordinate bus number
+ *      - "io_range": a QDict with memory range information
+ *      - "memory_range": a QDict with memory range information
+ *      - "prefetchable_range": a QDict with memory range information
  * - "regions": a QList of QDicts, each QDict represents a
  *   memory region of this device
  *
+ * The memory range QDict contains the following:
+ *
+ * - "base": base memory address
+ * - "limit": limit value
+ *
  * The region QDict can be an I/O region or a memory region,
  * an I/O region QDict contains the following:
  *
-- 
1.6.6

[Qemu-devel] [PATCH 5/5] PCI: do_pci_info(): PCI bridge devices support

[Luiz Capitulino]

This commit completes the do_pci_info() conversion to
QObject by adding support to PCI bridge devices.

This is done by recursively adding devices in the
"pci_bridge" key.

IMPORTANT: This code is being added separately because I could
NOT test it properly. According to Michael Tsirkin, it depends
on ultrasparc and it would take time to do the proper setup.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 hw/pci.c |   22 +++++++++++++++++++---
 1 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index ffe4cfe..6a932be 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1183,7 +1183,14 @@ static void pci_device_print(Monitor *mon, QDict *device)
 
     monitor_printf(mon, "      id \"%s\"\n", qdict_get_str(device, "qdev_id"));
 
-    /* TODO: PCI bridge devices */
+    if (qdict_haskey(device, "pci_bridge")) {
+        QListEntry *dev;
+
+        qdict = qdict_get_qdict(device, "pci_bridge");
+        QLIST_FOREACH_ENTRY(qdict_get_qlist(qdict, "devices"), dev) {
+            pci_device_print(mon, qobject_to_qdict(qlist_entry_obj(dev)));
+        }
+    }
 }
 
 void do_pci_info_print(Monitor *mon, const QObject *data)
@@ -1261,7 +1268,9 @@ static QObject *pci_get_regions_list(const PCIDevice *dev)
     return QOBJECT(regions_list);
 }
 
-static QObject *pci_get_dev_dict(PCIDevice *dev, int bus_num)
+static QObject *pci_get_devices_list(PCIBus *bus, int bus_num);
+
+static QObject *pci_get_dev_dict(PCIDevice *dev, PCIBus *bus, int bus_num)
 {
     int class;
     QObject *obj;
@@ -1300,6 +1309,12 @@ static QObject *pci_get_dev_dict(PCIDevice *dev, int bus_num)
         pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
                                 PCI_BASE_ADDRESS_MEM_PREFETCH));
 
+        if (dev->config[0x19] != 0) {
+            qdict = qobject_to_qdict(pci_bridge);
+            qdict_put_obj(qdict, "devices",
+                          pci_get_devices_list(bus, dev->config[0x19]));
+        }
+
         qdict = qobject_to_qdict(obj);
         qdict_put_obj(qdict, "pci_bridge", pci_bridge);
     }
@@ -1318,7 +1333,7 @@ static QObject *pci_get_devices_list(PCIBus *bus, int bus_num)
     for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) {
         dev = bus->devices[devfn];
         if (dev) {
-            qlist_append_obj(dev_list, pci_get_dev_dict(dev, bus_num));
+            qlist_append_obj(dev_list, pci_get_dev_dict(dev, bus, bus_num));
         }
     }
 
@@ -1371,6 +1386,7 @@ static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num)
  *      - "io_range": a QDict with memory range information
  *      - "memory_range": a QDict with memory range information
  *      - "prefetchable_range": a QDict with memory range information
+ *      - "devices": a QList of PCI devices if there's any attached
  * - "regions": a QList of QDicts, each QDict represents a
  *   memory region of this device
  *
-- 
1.6.6

Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Markus Armbruster]

Luiz Capitulino <lcapitulino@redhat.com> writes:

>  Hi,
>
>  This new version addresses Markus's comments.
>
> changelog
> ---------
>
> V1 -> V2
>
> - Make class_info's key 'desc' optional
> - Better indentation
> - Doc fixes
>
> V0 -> V1
>
> - Coding style fixes
> - Make 'BAR' and 'IRQ' keys lowercase
> - Add 'irq' key to the documentation
>
>  Thanks.

Looks good, although one comment still applies: PATCH 3/5 regresses info
pci, 4/5 and 5/5 fix it.  Do we care?  They're separate because they're
untested.

Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Luiz Capitulino]

On Wed, 20 Jan 2010 18:57:56 +0100
Markus Armbruster <armbru@redhat.com> wrote:

> Luiz Capitulino <lcapitulino@redhat.com> writes:
> 
> >  Hi,
> >
> >  This new version addresses Markus's comments.
> >
> > changelog
> > ---------
> >
> > V1 -> V2
> >
> > - Make class_info's key 'desc' optional
> > - Better indentation
> > - Doc fixes
> >
> > V0 -> V1
> >
> > - Coding style fixes
> > - Make 'BAR' and 'IRQ' keys lowercase
> > - Add 'irq' key to the documentation
> >
> >  Thanks.
> 
> Looks good, although one comment still applies: PATCH 3/5 regresses info
> pci, 4/5 and 5/5 fix it.  Do we care?  They're separate because they're
> untested.

 There are two problems here, which apply for those whom emulate
the hardware:

1. 'info pci' output will brake with git bisect

2. As the code is untested, it might be broken

 Only two 2 seems serious.

 Michael, does the sparc image on qemu.org have the hardware
in question (pci bridge)?

Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Blue Swirl]

On Wed, Jan 20, 2010 at 6:11 PM, Luiz Capitulino <lcapitulino@redhat.com> wrote:
> On Wed, 20 Jan 2010 18:57:56 +0100
> Markus Armbruster <armbru@redhat.com> wrote:
>
>> Luiz Capitulino <lcapitulino@redhat.com> writes:
>>
>> >  Hi,
>> >
>> >  This new version addresses Markus's comments.
>> >
>> > changelog
>> > ---------
>> >
>> > V1 -> V2
>> >
>> > - Make class_info's key 'desc' optional
>> > - Better indentation
>> > - Doc fixes
>> >
>> > V0 -> V1
>> >
>> > - Coding style fixes
>> > - Make 'BAR' and 'IRQ' keys lowercase
>> > - Add 'irq' key to the documentation
>> >
>> >  Thanks.
>>
>> Looks good, although one comment still applies: PATCH 3/5 regresses info
>> pci, 4/5 and 5/5 fix it.  Do we care?  They're separate because they're
>> untested.
>
>  There are two problems here, which apply for those whom emulate
> the hardware:
>
> 1. 'info pci' output will brake with git bisect
>
> 2. As the code is untested, it might be broken
>
>  Only two 2 seems serious.
>
>  Michael, does the sparc image on qemu.org have the hardware
> in question (pci bridge)?

Sparc64 has two Simba bridges, but currently they are broken so there
are no devices behind them. In addition there should be a DEC 21154
bridge.

There is no Sparc64 test image yet (very few Sparc32 machines did have
any PCI and we don't emulate them), but you can test the output
without any images:

qemu-system-sparc64 -L pc-bios -S -monitor stdio
QEMU 0.12.50 monitor - type 'help' for more information
(qemu) info pci
  Bus  0, device   0, function 0:
    Host bridge: PCI device 108e:a000
      id ""
  Bus  0, device   1, function 0:
    PCI bridge: PCI device 108e:5000
      BUS 0.
      secondary bus 0.
      subordinate bus 0.
      IO range [0x0000, 0x0fff]
      memory range [0x00000000, 0x000fffff]
      prefetchable memory range [0x00000000, 0x000fffff]
      id ""
  Bus  0, device   1, function 1:
    PCI bridge: PCI device 108e:5000
      BUS 0.
      secondary bus 0.
      subordinate bus 0.
      IO range [0x0000, 0x0fff]
      memory range [0x00000000, 0x000fffff]
      prefetchable memory range [0x00000000, 0x000fffff]
      id ""
  Bus  0, device   2, function 0:
    VGA controller: PCI device 1234:1111
      BAR0: 32 bit prefetchable memory at 0xffffffffffffffff [0x007ffffe].
      id ""
  Bus  0, device   3, function 0:
    Bridge: PCI device 108e:1000
      BAR0: 32 bit memory at 0xffffffffffffffff [0x00fffffe].
      BAR1: 32 bit memory at 0xffffffffffffffff [0x007ffffe].
      id ""
  Bus  0, device   4, function 0:
    Ethernet controller: PCI device 10ec:8029
      IRQ 0.
      BAR0: I/O at 0xffffffffffffffff [0x00fe].
      id ""
  Bus  0, device   5, function 0:
    IDE controller: PCI device 1095:0646
      IRQ 0.
      BAR0: I/O at 0xffffffffffffffff [0x0006].
      BAR1: I/O at 0xffffffffffffffff [0x0002].
      BAR2: I/O at 0xffffffffffffffff [0x0006].
      BAR3: I/O at 0xffffffffffffffff [0x0002].
      BAR4: I/O at 0xffffffffffffffff [0x000e].
      id ""
(qemu) c
(qemu) info pci
  Bus  0, device   0, function 0:
    Host bridge: PCI device 108e:a000
      id ""
  Bus  0, device   1, function 0:
    PCI bridge: PCI device 108e:5000
      BUS 0.
      secondary bus 0.
      subordinate bus 0.
      IO range [0x0000, 0x0fff]
      memory range [0x00000000, 0x000fffff]
      prefetchable memory range [0x00000000, 0x000fffff]
      id ""
  Bus  0, device   1, function 1:
    PCI bridge: PCI device 108e:5000
      BUS 0.
      secondary bus 0.
      subordinate bus 0.
      IO range [0x0000, 0x0fff]
      memory range [0x00000000, 0x000fffff]
      prefetchable memory range [0x00000000, 0x000fffff]
      id ""
  Bus  0, device   2, function 0:
    VGA controller: PCI device 1234:1111
      BAR0: 32 bit prefetchable memory at 0x00800000 [0x00ffffff].
      id ""
  Bus  0, device   3, function 0:
    Bridge: PCI device 108e:1000
      BAR0: 32 bit memory at 0x01000000 [0x01ffffff].
      BAR1: 32 bit memory at 0x02000000 [0x027fffff].
      id ""
  Bus  0, device   4, function 0:
    Ethernet controller: PCI device 10ec:8029
      IRQ 0.
      BAR0: I/O at 0x0400 [0x04ff].
      id ""
  Bus  0, device   5, function 0:
    IDE controller: PCI device 1095:0646
      IRQ 1.
      BAR0: I/O at 0x0500 [0x0507].
      BAR1: I/O at 0x0580 [0x0583].
      BAR2: I/O at 0x0600 [0x0607].
      BAR3: I/O at 0x0680 [0x0683].
      BAR4: I/O at 0x0700 [0x070f].
      id ""

Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Luiz Capitulino]

On Wed, 20 Jan 2010 19:22:48 +0000
Blue Swirl <blauwirbel@gmail.com> wrote:

> On Wed, Jan 20, 2010 at 6:11 PM, Luiz Capitulino <lcapitulino@redhat.com> wrote:
> > On Wed, 20 Jan 2010 18:57:56 +0100
> > Markus Armbruster <armbru@redhat.com> wrote:
> >
> >> Luiz Capitulino <lcapitulino@redhat.com> writes:
> >>
> >> >  Hi,
> >> >
> >> >  This new version addresses Markus's comments.
> >> >
> >> > changelog
> >> > ---------
> >> >
> >> > V1 -> V2
> >> >
> >> > - Make class_info's key 'desc' optional
> >> > - Better indentation
> >> > - Doc fixes
> >> >
> >> > V0 -> V1
> >> >
> >> > - Coding style fixes
> >> > - Make 'BAR' and 'IRQ' keys lowercase
> >> > - Add 'irq' key to the documentation
> >> >
> >> >  Thanks.
> >>
> >> Looks good, although one comment still applies: PATCH 3/5 regresses info
> >> pci, 4/5 and 5/5 fix it.  Do we care?  They're separate because they're
> >> untested.
> >
> >  There are two problems here, which apply for those whom emulate
> > the hardware:
> >
> > 1. 'info pci' output will brake with git bisect
> >
> > 2. As the code is untested, it might be broken
> >
> >  Only two 2 seems serious.
> >
> >  Michael, does the sparc image on qemu.org have the hardware
> > in question (pci bridge)?
> 
> Sparc64 has two Simba bridges, but currently they are broken so there
> are no devices behind them. In addition there should be a DEC 21154
> bridge.

 Can the DEC one have devices attached to it?

> There is no Sparc64 test image yet (very few Sparc32 machines did have
> any PCI and we don't emulate them), but you can test the output
> without any images:

 Oh man, thanks a lot!

 I got an abort() :)

Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject

[Blue Swirl]

On Thu, Jan 21, 2010 at 1:52 PM, Luiz Capitulino <lcapitulino@redhat.com> wrote:
> On Wed, 20 Jan 2010 19:22:48 +0000
> Blue Swirl <blauwirbel@gmail.com> wrote:
>
>> On Wed, Jan 20, 2010 at 6:11 PM, Luiz Capitulino <lcapitulino@redhat.com> wrote:
>> > On Wed, 20 Jan 2010 18:57:56 +0100
>> > Markus Armbruster <armbru@redhat.com> wrote:
>> >
>> >> Luiz Capitulino <lcapitulino@redhat.com> writes:
>> >>
>> >> >  Hi,
>> >> >
>> >> >  This new version addresses Markus's comments.
>> >> >
>> >> > changelog
>> >> > ---------
>> >> >
>> >> > V1 -> V2
>> >> >
>> >> > - Make class_info's key 'desc' optional
>> >> > - Better indentation
>> >> > - Doc fixes
>> >> >
>> >> > V0 -> V1
>> >> >
>> >> > - Coding style fixes
>> >> > - Make 'BAR' and 'IRQ' keys lowercase
>> >> > - Add 'irq' key to the documentation
>> >> >
>> >> >  Thanks.
>> >>
>> >> Looks good, although one comment still applies: PATCH 3/5 regresses info
>> >> pci, 4/5 and 5/5 fix it.  Do we care?  They're separate because they're
>> >> untested.
>> >
>> >  There are two problems here, which apply for those whom emulate
>> > the hardware:
>> >
>> > 1. 'info pci' output will brake with git bisect
>> >
>> > 2. As the code is untested, it might be broken
>> >
>> >  Only two 2 seems serious.
>> >
>> >  Michael, does the sparc image on qemu.org have the hardware
>> > in question (pci bridge)?
>>
>> Sparc64 has two Simba bridges, but currently they are broken so there
>> are no devices behind them. In addition there should be a DEC 21154
>> bridge.
>
>  Can the DEC one have devices attached to it?

It should, but sun4u machine does not even create it yet. There are
two DEC 21154 models, located in grackle_pci.c and unin_pci.c (PPC).
They should be unified and given a file of their own so they could be
used also for Sparc64.

>> There is no Sparc64 test image yet (very few Sparc32 machines did have
>> any PCI and we don't emulate them), but you can test the output
>> without any images:
>
>  Oh man, thanks a lot!
>
>  I got an abort() :)
>