From: Riku Voipio <riku.voipio@iki.fi>
To: Laurent Desnogues <laurent.desnogues@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 4/5] linux-user: Add access to TLS registers
Date: Tue, 26 Jan 2010 22:00:03 +0200 [thread overview]
Message-ID: <20100126200001.GA8762@aardvark.home> (raw)
In-Reply-To: <761ea48b1001260827y3fd1c292r6cbcb8740fe89bc6@mail.gmail.com>
On Tue, Jan 26, 2010 at 05:27:27PM +0100, Laurent Desnogues wrote:
> On Tue, Jan 26, 2010 at 5:00 PM, Riku Voipio <riku.voipio@iki.fi> wrote:
> > From: Riku Voipio <riku.voipio@nokia.com>
> >
> > If you compile applications with gcc -mtp=cp15, __thread
> > access's will generate an abort. Implement accessing allowed
> > cp15.c13 registers on ARMv6K+ in linux-user.
> >
> > Signed-off-by: Riku Voipio <riku.voipio@nokia.com>
> > ---
> > target-arm/helper.c | 27 ++++++++++++++++++++++++++-
> > 1 files changed, 26 insertions(+), 1 deletions(-)
> >
> > diff --git a/target-arm/helper.c b/target-arm/helper.c
> > index b3aec99..68578ce 100644
> > --- a/target-arm/helper.c
> > +++ b/target-arm/helper.c
> > @@ -505,13 +505,38 @@ uint32_t HELPER(get_cp)(CPUState *env, uint32_t insn)
> >
> > void HELPER(set_cp15)(CPUState *env, uint32_t insn, uint32_t val)
> > {
> > + int op2;
> > +
> > + op2 = (insn >> 5) & 7;
> > + /* Allow write access to CP15 User RW Thread ID Register */
> > + if (arm_feature (env, ARM_FEATURE_V6K) && ((insn >> 16) & 0xf) == 13) {
> > + switch (op2) {
> > + case 2:
> > + env->cp15.c13_tls1 = val;
> > + return;
> > + }
> > + }
> > cpu_abort(env, "cp15 insn %08x\n", insn);
> > }
> >
> > uint32_t HELPER(get_cp15)(CPUState *env, uint32_t insn)
> > {
> > + int op2;
> > + /* Allow read access to CP15 User RW and RO Thread ID Registers */
> > +
> > + op2 = (insn >> 5) & 7;
> > + if (arm_feature (env, ARM_FEATURE_V6K) && ((insn >> 16) & 0xf) == 13) {
> > + switch (op2) {
> > + case 2:
> > + return env->cp15.c13_tls1;
> > + case 3:
> > + return env->cp15.c13_tls2;
> > + default:
> > + goto bad_reg;
> > + }
> > + }
> > +bad_reg:
> > cpu_abort(env, "cp15 insn %08x\n", insn);
> > - return 0;
> > }
> >
> > /* These should probably raise undefined insn exceptions. */
> Most of the checks you do here could be done in translate.c.
> Wouldn't it be better to do them there?
Indeed, thus we could even avoid the helper completly. I just followed the the
cp15 implementation of system-qemu here.
next prev parent reply other threads:[~2010-01-26 20:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-26 15:59 [Qemu-devel] [PATCH 0/5] linux-user for-usptream patches Riku Voipio
2010-01-26 16:00 ` [Qemu-devel] [PATCH 1/5] linux-user: adapt uname machine to emulated CPU Riku Voipio
2010-01-26 16:00 ` [Qemu-devel] [PATCH 2/5] fix locking error with current_tb Riku Voipio
2010-01-26 16:00 ` [Qemu-devel] [PATCH 3/5] linux-user: remove signal handler before calling abort() Riku Voipio
2010-01-26 16:00 ` [Qemu-devel] [PATCH 4/5] linux-user: Add access to TLS registers Riku Voipio
2010-01-26 16:27 ` Laurent Desnogues
2010-01-26 20:00 ` Riku Voipio [this message]
2010-01-26 16:00 ` [Qemu-devel] [PATCH 5/5] target-arm: Thread ID Registers are ARMv6K + Riku Voipio
2010-01-26 16:28 ` Laurent Desnogues
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