From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Nk8EA-00014W-4v for qemu-devel@nongnu.org; Tue, 23 Feb 2010 22:47:58 -0500 Received: from [199.232.76.173] (port=42427 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Nk8E9-00014H-PM for qemu-devel@nongnu.org; Tue, 23 Feb 2010 22:47:57 -0500 Received: from Debian-exim by monty-python.gnu.org with spam-scanned (Exim 4.60) (envelope-from ) id 1Nk8E8-00016n-5m for qemu-devel@nongnu.org; Tue, 23 Feb 2010 22:47:57 -0500 Received: from smtp.mailix.net ([66.11.225.183]:57161) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Nk8E7-00016c-Oo for qemu-devel@nongnu.org; Tue, 23 Feb 2010 22:47:56 -0500 Received: from [66.68.101.11] (helo=shadowfax.no-ip.com) by smtp.mailix.net with asmtp (Exim 4.24-CA) id 1Nk8E4-0005Q7-RL for qemu-devel@nongnu.org; Tue, 23 Feb 2010 19:47:52 -0800 Received: from [66.68.101.11] ([66.68.101.11]) by shadowfax.no-ip.com (Kerio MailServer 6.7.2) for qemu-devel@nongnu.org; Tue, 23 Feb 2010 21:47:51 -0600 From: "Adnan Khaleel" Message-ID: <20100224034751.15522ad4@shadowfax.no-ip.com> Date: Tue, 23 Feb 2010 21:47:51 -0600 MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="-----------83ac55a5164b3f7dc4dcbe86e8baeb22" Subject: [Qemu-devel] Question about PCIe and MSI-X status in Qemu Reply-To: adnan@khaleel.us List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This is a multi-part message in MIME format. -------------83ac55a5164b3f7dc4dcbe86e8baeb22 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Could one of the developers give a brief status of the current state of = support for PCIe and MSI-X interrupts in Qemu. I'm trying to build a System-C device that I'd like to co-simulate with = Qemu and have the ability to use the same software stack as well. The ke= rnel modules rely on MSI-X interrupts and the device itself would be a P= CIe device. Also, in your opinion, what would be the best device model (NIC etc) tha= t Qemu already has in place that would serve as a good starting template= =3F I know this is a fairly broad question so any pointers would be helpful. Thanks AK -------------83ac55a5164b3f7dc4dcbe86e8baeb22 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Could one of the developers give a brief status of the current state of = support for PCIe and MSI-X interrupts in Qemu.
I'm trying to build a = System-C device that I'd like to co-simulate with Qemu and have the abil= ity to use the same software stack as well. The kernel modules rely on M= SI-X interrupts and the device itself would be a PCIe device.

Als= o, in your opinion, what would be the best device model (NIC etc) that Q= emu already has in place that would serve as a good starting template=3F=

I know this is a fairly broad question so any pointers would be = helpful.

Thanks

AK
-------------83ac55a5164b3f7dc4dcbe86e8baeb22--