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From: Aurelien Jarno <aurelien@aurel32.net>
To: Andre Przywara <andre.przywara@amd.com>
Cc: john.cooper@redhat.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 02/13] cpuid: replace magic number with named constant
Date: Sat, 6 Mar 2010 19:25:32 +0100	[thread overview]
Message-ID: <20100306182532.GD14275@volta.aurel32.net> (raw)
In-Reply-To: <1265105301-3455-3-git-send-email-andre.przywara@amd.com>

On Tue, Feb 02, 2010 at 11:08:10AM +0100, Andre Przywara wrote:
> CPUID leaf Fn8000_0001.EDX contains a copy of many Fn0000_0001.EDX bits.
> Define a name for the mask to improve readability and avoid typos.
> 
> Signed-off-by: Andre Przywara <andre.przywara@amd.com>

Acked-by: Aurelien Jarno <aurelien@aurel32.net>

> ---
>  target-i386/cpuid.c |   11 ++++++-----
>  1 files changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
> index aaa14ba..0a17020 100644
> --- a/target-i386/cpuid.c
> +++ b/target-i386/cpuid.c
> @@ -130,6 +130,7 @@ typedef struct x86_def_t {
>            CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
>            CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
>            CPUID_PAE | CPUID_SEP | CPUID_APIC)
> +#define EXT2_FEATURE_MASK 0x0183F3FF
>  static x86_def_t x86_defs[] = {
>  #ifdef TARGET_X86_64
>      {
> @@ -147,7 +148,7 @@ static x86_def_t x86_defs[] = {
>          /* this feature is needed for Solaris and isn't fully implemented */
>              CPUID_PSE36,
>          .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
> -        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | 
> +        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | 
>              CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
>          .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
>              CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
> @@ -170,7 +171,7 @@ static x86_def_t x86_defs[] = {
>          .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
>              CPUID_EXT_POPCNT,
>          /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
> -        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | 
> +        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | 
>              CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
>              CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
>              CPUID_EXT2_FFXSR,
> @@ -220,7 +221,7 @@ static x86_def_t x86_defs[] = {
>          /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
>          .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
>          /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
> -        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) |
> +        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
>              CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
>          /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
>                      CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
> @@ -308,7 +309,7 @@ static x86_def_t x86_defs[] = {
>          .stepping = 3,
>          .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME |
>                      CPUID_MTRR | CPUID_MCA,
> -        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | CPUID_EXT2_MMXEXT |
> +        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT |
>                            CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
>          .xlevel = 0x80000008,
>          /* XXX: put another string ? */
> @@ -330,7 +331,7 @@ static x86_def_t x86_defs[] = {
>              CPUID_EXT_SSE3 /* PNI */ | CPUID_EXT_SSSE3,
>              /* Missing: CPUID_EXT_DSCPL | CPUID_EXT_EST |
>               * CPUID_EXT_TM2 | CPUID_EXT_XTPR */
> -        .ext2_features = (PPRO_FEATURES & 0x0183F3FF) | CPUID_EXT2_NX,
> +        .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
>          /* Missing: .ext3_features = CPUID_EXT3_LAHF_LM */
>          .xlevel = 0x8000000A,
>          .model_id = "Intel(R) Atom(TM) CPU N270   @ 1.60GHz",
> -- 
> 1.6.4
> 
> 
> 
> 
> 

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net

  reply	other threads:[~2010-03-06 18:25 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-02-02 10:08 [Qemu-devel] [PATCH 00/13] i386 cpuid: cleanup and fixes Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 01/13] cpuid: move CPUID functions into separate file Andre Przywara
2010-03-06 18:25   ` Aurelien Jarno
2010-02-02 10:08 ` [Qemu-devel] [PATCH 02/13] cpuid: replace magic number with named constant Andre Przywara
2010-03-06 18:25   ` Aurelien Jarno [this message]
2010-02-02 10:08 ` [Qemu-devel] [PATCH 03/13] cpuid: moved host_cpuid function and remove prototype Andre Przywara
2010-03-06 18:26   ` Aurelien Jarno
2010-02-02 10:08 ` [Qemu-devel] [PATCH 04/13] cpuid: Replace strtok with get_opt_name Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 05/13] cpuid: add missing CPUID feature flag names Andre Przywara
2010-03-06 18:26   ` Aurelien Jarno
2010-02-02 10:08 ` [Qemu-devel] [PATCH 06/13] cpuid: list all known x86 CPUID feature flags Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 07/13] cpuid: remove unnecessary kvm_trim function Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 08/13] cpuid: simplify CPUID flag search function Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 09/13] cpuid: propagate further CPUID leafs when -cpu host Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 10/13] cpuid: add TCG feature bit trimming Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 11/13] cpuid: Always expose 32 and 64-bit CPUs Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 12/13] cpuid: Add kvm32 CPU model Andre Przywara
2010-02-02 10:08 ` [Qemu-devel] [PATCH 13/13] cpuid: fix CPUID levels Andre Przywara

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