From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NvIEg-0006sT-Nu for qemu-devel@nongnu.org; Fri, 26 Mar 2010 18:42:38 -0400 Received: from [140.186.70.92] (port=56294 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NvIEf-0006rf-9c for qemu-devel@nongnu.org; Fri, 26 Mar 2010 18:42:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1NvIEd-0002Cw-KC for qemu-devel@nongnu.org; Fri, 26 Mar 2010 18:42:37 -0400 Received: from hall.aurel32.net ([88.191.82.174]:59073) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1NvIEd-0002Cq-BS for qemu-devel@nongnu.org; Fri, 26 Mar 2010 18:42:35 -0400 Date: Fri, 26 Mar 2010 23:42:34 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] TBL register permissions for PPC Message-ID: <20100326224234.GZ13677@hall.aurel32.net> References: <4aa8564b0912011033n68653e6dufc4bd87ccaf030a5@mail.gmail.com> <8F6B1156-5574-41A3-B2EE-978E77391EF7@suse.de> <4aa8564b1003241456y4851b964iafcc534324506666@mail.gmail.com> <09F9B6EF-33C7-4755-82DB-CB0D60F49649@suse.de> <4aa8564b1003251731o2e0dc66ci603cefa86d70d87@mail.gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <4aa8564b1003251731o2e0dc66ci603cefa86d70d87@mail.gmail.com> Sender: Aurelien Jarno List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Dmitry Ilyevsky Cc: Alexander Graf , qemu-devel@nongnu.org On Fri, Mar 26, 2010 at 03:31:25AM +0300, Dmitry Ilyevsky wrote: > On Thu, Mar 25, 2010 at 10:53 AM, Alexander Graf wrote: > > > > On 24.03.2010, at 22:56, Dmitry Ilyevsky wrote: > > > >> > >> Hello All, > >> > >> Please review patch for TBL SPR read access for generic PPC. > >> > >> Description: > >> > >> POWER specification docs define TBL/TBU SPRs as readable in user and privileged modes. Therefore SPRs permissions were changed in gen_tbl function in target-ppc/translate_init.c file. > >> > >> Testing: > >> > >> Tested with vxworks-6.2 bsp and OS on custom qemu board that includes ppc405 emulated core > > > > A couple of comments to this patch. > > > > 1) Please don't top-post. > > 2) Always put a Signed-off-by: in the patch > > 3) Put the patch description into the patch, so git knows what to do with it > > 4) Don't use html features in mail :-) > > > > The patch looks good otherwise. > > > > > > Alex > > > > > > Corrected. > > Thanks, > Dmitry I. Thanks, applied. > From b5846b7df136c1eff7df8dada8800c81e1799cf4 Mon Sep 17 00:00:00 2001 > From: Dmitry Ilyevsky > Date: Fri, 26 Mar 2010 03:25:36 +0300 > Subject: Generic PowerPC TBL > > Time base SPRs TBL/TBU should be accessible in user/priv modes for reading as specified in POWER ISA documentation. Therefore SPRs permissions were changed in gen_tbl function. > > Signed-off-by: Dmitry Ilyevsky > --- > target-ppc/translate_init.c | 8 ++++---- > 1 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index db4dc17..e8eadf4 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -777,16 +777,16 @@ static void gen_tbl (CPUPPCState *env) > &spr_read_tbl, SPR_NOACCESS, > 0x00000000); > spr_register(env, SPR_TBL, "TBL", > - SPR_NOACCESS, SPR_NOACCESS, > - SPR_NOACCESS, &spr_write_tbl, > + &spr_read_tbl, SPR_NOACCESS, > + &spr_read_tbl, &spr_write_tbl, > 0x00000000); > spr_register(env, SPR_VTBU, "TBU", > &spr_read_tbu, SPR_NOACCESS, > &spr_read_tbu, SPR_NOACCESS, > 0x00000000); > spr_register(env, SPR_TBU, "TBU", > - SPR_NOACCESS, SPR_NOACCESS, > - SPR_NOACCESS, &spr_write_tbu, > + &spr_read_tbu, SPR_NOACCESS, > + &spr_read_tbu, &spr_write_tbu, > 0x00000000); > } > > -- > 1.7.0 > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net