[Qemu-devel] [PATCH] sparc64: fix 128-bit atomic load from nucleus context

[Qemu-devel] [PATCH] sparc64: fix 128-bit atomic load from nucleus context

[Igor V. Kovalenko]

From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>

Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
---
 sparc-dis.c              |    2 ++
 target-sparc/op_helper.c |   10 +++++-----
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/sparc-dis.c b/sparc-dis.c
index c1b682d..dbd3b4f 100644
--- a/sparc-dis.c
+++ b/sparc-dis.c
@@ -2155,6 +2155,8 @@ static const arg asi_table_v9[] =
   /* These are UltraSPARC extensions.  */
   { 0x14, "#ASI_PHYS_USE_EC"},
   { 0x15, "#ASI_PHYS_BYPASS_EC_WITH_EBIT"},
+  { 0x24, "#ASI_NUCLEUS_QUAD_LDD" },
+  { 0x2c, "#ASI_NUCLEUS_QUAD_LDD_LITTLE" },
   { 0x45, "#ASI_LSU_CONTROL_REG"},
   { 0x47, "#ASI_DCACHE_TAG"},
   { 0x49, "#ASI_INTR_RECEIVE"},
diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index e946ec7..63fef8c 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -3088,19 +3088,19 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd)
     case 0x2c: // Nucleus quad LDD 128 bit atomic LE
         helper_check_align(addr, 0xf);
         if (rd == 0) {
-            env->gregs[1] = ldq_kernel(addr + 8);
+            env->gregs[1] = ldq_nucleus(addr + 8);
             if (asi == 0x2c)
                 bswap64s(&env->gregs[1]);
         } else if (rd < 8) {
-            env->gregs[rd] = ldq_kernel(addr);
-            env->gregs[rd + 1] = ldq_kernel(addr + 8);
+            env->gregs[rd] = ldq_nucleus(addr);
+            env->gregs[rd + 1] = ldq_nucleus(addr + 8);
             if (asi == 0x2c) {
                 bswap64s(&env->gregs[rd]);
                 bswap64s(&env->gregs[rd + 1]);
             }
         } else {
-            env->regwptr[rd] = ldq_kernel(addr);
-            env->regwptr[rd + 1] = ldq_kernel(addr + 8);
+            env->regwptr[rd] = ldq_nucleus(addr);
+            env->regwptr[rd + 1] = ldq_nucleus(addr + 8);
             if (asi == 0x2c) {
                 bswap64s(&env->regwptr[rd]);
                 bswap64s(&env->regwptr[rd + 1]);

Re: [Qemu-devel] [PATCH] sparc64: fix 128-bit atomic load from nucleus context

[Blue Swirl]

On Fri, May 28, 2010 at 9:48 AM, Igor V. Kovalenko
<igor.v.kovalenko@gmail.com> wrote:
> From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
>
> Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
> ---
>  sparc-dis.c              |    2 ++
>  target-sparc/op_helper.c |   10 +++++-----
>  2 files changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/sparc-dis.c b/sparc-dis.c
> index c1b682d..dbd3b4f 100644
> --- a/sparc-dis.c
> +++ b/sparc-dis.c
> @@ -2155,6 +2155,8 @@ static const arg asi_table_v9[] =
>   /* These are UltraSPARC extensions.  */
>   { 0x14, "#ASI_PHYS_USE_EC"},
>   { 0x15, "#ASI_PHYS_BYPASS_EC_WITH_EBIT"},
> +  { 0x24, "#ASI_NUCLEUS_QUAD_LDD" },
> +  { 0x2c, "#ASI_NUCLEUS_QUAD_LDD_LITTLE" },
>   { 0x45, "#ASI_LSU_CONTROL_REG"},
>   { 0x47, "#ASI_DCACHE_TAG"},
>   { 0x49, "#ASI_INTR_RECEIVE"},

The patch does not apply because the above line is not in the tree.

This change should be also mentioned in the commit body.

> diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
> index e946ec7..63fef8c 100644
> --- a/target-sparc/op_helper.c
> +++ b/target-sparc/op_helper.c
> @@ -3088,19 +3088,19 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd)
>     case 0x2c: // Nucleus quad LDD 128 bit atomic LE
>         helper_check_align(addr, 0xf);
>         if (rd == 0) {
> -            env->gregs[1] = ldq_kernel(addr + 8);
> +            env->gregs[1] = ldq_nucleus(addr + 8);
>             if (asi == 0x2c)
>                 bswap64s(&env->gregs[1]);
>         } else if (rd < 8) {
> -            env->gregs[rd] = ldq_kernel(addr);
> -            env->gregs[rd + 1] = ldq_kernel(addr + 8);
> +            env->gregs[rd] = ldq_nucleus(addr);
> +            env->gregs[rd + 1] = ldq_nucleus(addr + 8);
>             if (asi == 0x2c) {
>                 bswap64s(&env->gregs[rd]);
>                 bswap64s(&env->gregs[rd + 1]);
>             }
>         } else {
> -            env->regwptr[rd] = ldq_kernel(addr);
> -            env->regwptr[rd + 1] = ldq_kernel(addr + 8);
> +            env->regwptr[rd] = ldq_nucleus(addr);
> +            env->regwptr[rd + 1] = ldq_nucleus(addr + 8);
>             if (asi == 0x2c) {
>                 bswap64s(&env->regwptr[rd]);
>                 bswap64s(&env->regwptr[rd + 1]);
>
>
>

Re: [Qemu-devel] [PATCH] sparc64: fix 128-bit atomic load from nucleus context

[Igor Kovalenko]

On Sat, May 29, 2010 at 12:30 AM, Blue Swirl <blauwirbel@gmail.com> wrote:
> On Fri, May 28, 2010 at 9:48 AM, Igor V. Kovalenko
> <igor.v.kovalenko@gmail.com> wrote:
>> From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
>>
>> Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
>> ---
>>  sparc-dis.c              |    2 ++
>>  target-sparc/op_helper.c |   10 +++++-----
>>  2 files changed, 7 insertions(+), 5 deletions(-)
>>
>> diff --git a/sparc-dis.c b/sparc-dis.c
>> index c1b682d..dbd3b4f 100644
>> --- a/sparc-dis.c
>> +++ b/sparc-dis.c
>> @@ -2155,6 +2155,8 @@ static const arg asi_table_v9[] =
>>   /* These are UltraSPARC extensions.  */
>>   { 0x14, "#ASI_PHYS_USE_EC"},
>>   { 0x15, "#ASI_PHYS_BYPASS_EC_WITH_EBIT"},
>> +  { 0x24, "#ASI_NUCLEUS_QUAD_LDD" },
>> +  { 0x2c, "#ASI_NUCLEUS_QUAD_LDD_LITTLE" },
>>   { 0x45, "#ASI_LSU_CONTROL_REG"},
>>   { 0x47, "#ASI_DCACHE_TAG"},
>>   { 0x49, "#ASI_INTR_RECEIVE"},
>
> The patch does not apply because the above line is not in the tree.
>
> This change should be also mentioned in the commit body.

I decided to drop disassembler update, it can be done separately once
for all ASI extensions.

-- 
Kind regards,
Igor V. Kovalenko