From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=32989 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OJXp4-0000Zz-LR for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OJXp2-0006Ok-IH for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:26 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:34677) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OJXp2-0006Nu-Dx for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:24 -0400 Received: by mail-fx0-f45.google.com with SMTP id 17so4227877fxm.4 for ; Tue, 01 Jun 2010 13:12:24 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=[192.168.1.2]) by skyserv with esmtp (Exim 4.71) (envelope-from ) id 1OJXp0-0001b5-Bb for qemu-devel@nongnu.org; Wed, 02 Jun 2010 00:12:22 +0400 From: "Igor V. Kovalenko" Date: Wed, 02 Jun 2010 00:12:22 +0400 Message-ID: <20100601201222.5908.3583.stgit@skyserv> In-Reply-To: <20100601200434.5908.19495.stgit@skyserv> References: <20100601200434.5908.19495.stgit@skyserv> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 1/8] sparc64: fix tag access register on mmu traps List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Igor V. Kovalenko - set mmu tag access register on FAULT and PROT traps as well Signed-off-by: Igor V. Kovalenko --- target-sparc/helper.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 96a22f3..aa1fd63 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -495,6 +495,9 @@ static int get_physical_address_data(CPUState *env, env->dmmu.sfsr |= (fault_type << 7); env->dmmu.sfar = address; /* Fault address register */ + + env->dmmu.tag_access = (address & ~0x1fffULL) | context; + return 1; } } @@ -544,6 +547,8 @@ static int get_physical_address_code(CPUState *env, env->immu.sfsr |= (is_user << 3) | 1; env->exception_index = TT_TFAULT; + env->immu.tag_access = (address & ~0x1fffULL) | context; + DPRINTF_MMU("TFAULT at %" PRIx64 " context %" PRIx64 "\n", address, context);