From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=33082 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OJXpN-0000jK-GY for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OJXpI-0006Rk-6A for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:45 -0400 Received: from fg-out-1718.google.com ([72.14.220.159]:28554) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OJXpI-0006Ra-1f for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:12:40 -0400 Received: by fg-out-1718.google.com with SMTP id 16so1606939fgg.10 for ; Tue, 01 Jun 2010 13:12:39 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=[192.168.1.2]) by skyserv with esmtp (Exim 4.71) (envelope-from ) id 1OJXpF-0001bv-NA for qemu-devel@nongnu.org; Wed, 02 Jun 2010 00:12:37 +0400 From: "Igor V. Kovalenko" Date: Wed, 02 Jun 2010 00:12:37 +0400 Message-ID: <20100601201237.5908.3446.stgit@skyserv> In-Reply-To: <20100601200434.5908.19495.stgit@skyserv> References: <20100601200434.5908.19495.stgit@skyserv> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 4/8] sparc64: fix ldxfsr insn List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Igor V. Kovalenko - rearrange code to break from switch when appropriate - allow deprecated ldfsr insn Signed-off-by: Igor V. Kovalenko --- target-sparc/translate.c | 6 +++++- 1 files changed, 5 insertions(+), 1 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index eff64d4..0bc1a82 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -4476,7 +4476,11 @@ static void disas_sparc_insn(DisasContext * dc) if (rd == 1) { tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx); gen_helper_ldxfsr(cpu_tmp64); - } else + } else { + tcg_gen_qemu_ld32u(cpu_tmp0, cpu_addr, dc->mem_idx); + tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); + gen_helper_ldfsr(cpu_tmp32); + } #else { tcg_gen_qemu_ld32u(cpu_tmp32, cpu_addr, dc->mem_idx);