From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=33211 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OJXpe-0000uN-Qv for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:13:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OJXpd-0006WW-Do for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:13:02 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:34677) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OJXpd-0006Nu-9P for qemu-devel@nongnu.org; Tue, 01 Jun 2010 16:13:01 -0400 Received: by mail-fx0-f45.google.com with SMTP id 17so4227877fxm.4 for ; Tue, 01 Jun 2010 13:13:01 -0700 (PDT) Received: from localhost ([127.0.0.1] helo=[192.168.1.2]) by skyserv with esmtp (Exim 4.71) (envelope-from ) id 1OJXpa-0001d3-Dm for qemu-devel@nongnu.org; Wed, 02 Jun 2010 00:12:58 +0400 From: "Igor V. Kovalenko" Date: Wed, 02 Jun 2010 00:12:58 +0400 Message-ID: <20100601201258.5908.86455.stgit@skyserv> In-Reply-To: <20100601200434.5908.19495.stgit@skyserv> References: <20100601200434.5908.19495.stgit@skyserv> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH 8/8] sparc64: fix umul and smul insns List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org From: Igor V. Kovalenko - truncate and sign or zero extend operands before multiplication - factor out common code to gen_op_multiply() with parameter to sign/zero extend - call gen_op_multiply from gen_op_umul and gen_op_smul Signed-off-by: Igor V. Kovalenko --- target-sparc/translate.c | 55 ++++++++++++++++++++++++---------------------- 1 files changed, 29 insertions(+), 26 deletions(-) diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 0bc1a82..23f9519 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -662,50 +662,53 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2) tcg_gen_mov_tl(dst, cpu_cc_dst); } -static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2) +static inline void gen_op_multiply(TCGv dst, TCGv src1, TCGv src2, int sign_ext) { + TCGv_i32 r_src1, r_src2; TCGv_i64 r_temp, r_temp2; + r_src1 = tcg_temp_new_i32(); + r_src2 = tcg_temp_new_i32(); + + tcg_gen_trunc_tl_i32(r_src1, src1); + tcg_gen_trunc_tl_i32(r_src2, src2); + r_temp = tcg_temp_new_i64(); r_temp2 = tcg_temp_new_i64(); - tcg_gen_extu_tl_i64(r_temp, src2); - tcg_gen_extu_tl_i64(r_temp2, src1); + if (sign_ext) { + tcg_gen_ext_i32_i64(r_temp, r_src2); + tcg_gen_ext_i32_i64(r_temp2, r_src1); + } else { + tcg_gen_extu_i32_i64(r_temp, r_src2); + tcg_gen_extu_i32_i64(r_temp2, r_src1); + } + tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); tcg_gen_shri_i64(r_temp, r_temp2, 32); tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp); tcg_temp_free_i64(r_temp); tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff); -#ifdef TARGET_SPARC64 - tcg_gen_mov_i64(dst, r_temp2); -#else + tcg_gen_trunc_i64_tl(dst, r_temp2); -#endif + tcg_temp_free_i64(r_temp2); + + tcg_temp_free_i32(r_src1); + tcg_temp_free_i32(r_src2); } -static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2) +static inline void gen_op_umul(TCGv dst, TCGv src1, TCGv src2) { - TCGv_i64 r_temp, r_temp2; - - r_temp = tcg_temp_new_i64(); - r_temp2 = tcg_temp_new_i64(); - - tcg_gen_ext_tl_i64(r_temp, src2); - tcg_gen_ext_tl_i64(r_temp2, src1); - tcg_gen_mul_i64(r_temp2, r_temp, r_temp2); + /* zero-extend truncated operands before multiplication */ + gen_op_multiply(dst, src1, src2, 0); +} - tcg_gen_shri_i64(r_temp, r_temp2, 32); - tcg_gen_trunc_i64_tl(cpu_tmp0, r_temp); - tcg_temp_free_i64(r_temp); - tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff); -#ifdef TARGET_SPARC64 - tcg_gen_mov_i64(dst, r_temp2); -#else - tcg_gen_trunc_i64_tl(dst, r_temp2); -#endif - tcg_temp_free_i64(r_temp2); +static inline void gen_op_smul(TCGv dst, TCGv src1, TCGv src2) +{ + /* sign-extend truncated operands before multiplication */ + gen_op_multiply(dst, src1, src2, 1); } #ifdef TARGET_SPARC64