From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from [140.186.70.92] (port=42984 helo=eggs.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1OKafU-0005id-E6
	for qemu-devel@nongnu.org; Fri, 04 Jun 2010 13:26:57 -0400
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69)
	(envelope-from <aurelien@aurel32.net>) id 1OKafS-0001IN-7v
	for qemu-devel@nongnu.org; Fri, 04 Jun 2010 13:26:51 -0400
Received: from hall.aurel32.net ([88.191.82.174]:39909)
	by eggs.gnu.org with esmtp (Exim 4.69)
	(envelope-from <aurelien@aurel32.net>) id 1OKafR-0001IE-WE
	for qemu-devel@nongnu.org; Fri, 04 Jun 2010 13:26:50 -0400
Date: Fri, 4 Jun 2010 19:26:47 +0200
From: Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] [PATCH 00/10] target-mips: add microMIPS ASE
	support, v2
Message-ID: <20100604172647.GA2027@ohm.aurel32.net>
References: <1274717984-25887-1-git-send-email-froydnj@codesourcery.com>
	<20100604155111.GD19235@codesourcery.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=iso-8859-15
Content-Disposition: inline
In-Reply-To: <20100604155111.GD19235@codesourcery.com>
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Nathan Froyd <froydnj@codesourcery.com>
Cc: qemu-devel@nongnu.org

On Fri, Jun 04, 2010 at 08:51:12AM -0700, Nathan Froyd wrote:
> On Mon, May 24, 2010 at 09:19:34AM -0700, Nathan Froyd wrote:
> > This patch series adds support for the microMIPS ASE.  microMIPS is a
> > new ASE similar to MIPS16, but re-encodes the entire instruction set
> > into 16-bit and 32-bit instructions--in contrast to MIPS16, which
> > re-encodes only integer instructions.  The mechanisms for going in and
> > out of microMIPS mode are identical to those for MIPS16; a given chip
> > cannot support both ASEs simultaneously.
> 
> Ping.
> 

Pong. I haven't forgotten your patches. I try to review patches more or
less in the order they arrive, and I haven't arrived yet here (though I
am close).

In general when someone else review patches, that clear helps to get them
quickly committed.

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@aurel32.net                 http://www.aurel32.net