From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=40439 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1ONs6V-0006AM-Fz for qemu-devel@nongnu.org; Sun, 13 Jun 2010 14:40:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1ONs6U-0004qt-2I for qemu-devel@nongnu.org; Sun, 13 Jun 2010 14:40:19 -0400 Received: from mail.codesourcery.com ([38.113.113.100]:60968) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1ONs6T-0004qR-Rt for qemu-devel@nongnu.org; Sun, 13 Jun 2010 14:40:18 -0400 From: Paul Brook Subject: Re: [Qemu-devel] [PATCH 09/16] Enable message delivery via IRQs Date: Sun, 13 Jun 2010 19:39:08 +0100 References: <201006131649.02519.paul@codesourcery.com> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201006131939.08385.paul@codesourcery.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: Jan Kiszka , Jan Kiszka , qemu-devel@nongnu.org, Gleb Natapov , Juan Quintela > On Sun, Jun 13, 2010 at 3:49 PM, Paul Brook wrote: > >> I think we could solve all problems (well, maybe not world peace, yet) > >> by switching to message based system for all of DMA and IRQs. > >> > >> Each device would have a message input port and way to output messages. > >> > >> Examples: > >> > >> Zero copy memory access from device D1 to D2 to host memory (D3) with > >> access broken to page length units and errors occurring on the last > >> byte: > >> D1 send_msg(ID, MSG_MEM_WRITE, DMA address, length) -> D2 > >> > >>... > >> > >> IRQ delivery chain D1->D2->D3 with coalescing, messages, delivery > >> reporting and EOI: > >> D1 send_msg(ID, MSG_IRQ_RAISE, payload) -> D2 > > > > This feels like a terrible idea to me. It introduces an unnecessary RPC > > indirection layer without actually solving any of the problems. It just > > makes it harder (if not impossible) for the compiler to verify any of > > the interfaces between objects. > > For the memory access case, in practice the interface could be > sysbus_memory_rw(DeviceState *parent, target_phys_addr_t addr, > target_phys_addr_t size) Why "parent"? > in place of send_msg() and > sysbus_memory_rw_cb(DeviceState *dev, void *ptr, size_t size, int status) > in place of send_replymsg() so we'd have compiler type checks. I don't see any point point trying to squeeze this through a common message passing API. We *could* do that if we really wanted, but It's a lot of hassle. If devices are going to end up using wrappers that look a lot like a straight API then what's the point? Paul