From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=46039 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OW6KP-0001qq-5n for qemu-devel@nongnu.org; Tue, 06 Jul 2010 07:28:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OW6KO-00059v-1h for qemu-devel@nongnu.org; Tue, 06 Jul 2010 07:28:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52961) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OW6KN-00059h-RP for qemu-devel@nongnu.org; Tue, 06 Jul 2010 07:28:40 -0400 Date: Tue, 6 Jul 2010 14:23:27 +0300 From: "Michael S. Tsirkin" Message-ID: <20100706112327.GA20108@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] [PATCH] pci: pass bridge update to secondary bus List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: yamahata@valinux.co.jp, qemu-devel@nongnu.org bridge config write should trigger updates on the secondary bus. never on the primary bus. Signed-off-by: Michael S. Tsirkin --- Compile-tested only. Isaku Yamahata, could you review this please? You wrote the code, and you seem to have some bridged setups. hw/pci.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 926cf63..011d83e 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1513,7 +1513,9 @@ static void pci_bridge_write_config(PCIDevice *d, /* memory base/limit, prefetchable base/limit and io base/limit upper 16 */ ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) { - pci_bridge_update_mappings(d->bus); + PCIBridge *s = container_of(d, PCIBridge, dev); + PCIBus *secondary_bus = &s->bus; + pci_bridge_update_mappings(secondary_bus); } } -- 1.7.2.rc0.14.g41c1c