From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=54503 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OZPgz-0003OQ-0l for qemu-devel@nongnu.org; Thu, 15 Jul 2010 10:45:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OZPgu-0006d6-Be for qemu-devel@nongnu.org; Thu, 15 Jul 2010 10:45:40 -0400 Received: from 8bytes.org ([88.198.83.132]:37791) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OZPgu-0006cz-5t for qemu-devel@nongnu.org; Thu, 15 Jul 2010 10:45:36 -0400 Date: Thu, 15 Jul 2010 16:45:34 +0200 From: Joerg Roedel Subject: Re: [Qemu-devel] Re: [RFC PATCH 4/7] ide: IOMMU support Message-ID: <20100715144534.GF23755@8bytes.org> References: <1279086307-9596-1-git-send-email-eduard.munteanu@linux360.ro> <201007141453.06131.paul@codesourcery.com> <20100714183343.GB23755@8bytes.org> <201007142113.44913.paul@codesourcery.com> <4C3E2C2E.70507@codemonkey.ws> <20100715091031.GD23755@8bytes.org> <4C3F02D2.2090006@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4C3F02D2.2090006@codemonkey.ws> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: avi@redhat.com, Eduard - Gabriel Munteanu , Paul Brook , kvm@vger.kernel.org, qemu-devel@nongnu.org On Thu, Jul 15, 2010 at 07:45:06AM -0500, Anthony Liguori wrote: > On 07/15/2010 04:10 AM, Joerg Roedel wrote: >> If this means a seperate interface for device dma accesses and not fold >> that functionality into the cpu_physical_memory* interface I agree too :-) >> > No. PCI devices should never call cpu_physical_memory*. Fully agreed. > PCI devices should call pci_memory*. > > ISA devices should call isa_memory*. This is a seperate interface. I like the idea and as you stated below it has clear advantages, so lets go this way. > All device memory accesses should go through their respective buses. > There can be multiple IOMMUs at different levels of the device > hierarchy. If you don't provide bus-level memory access functions that > chain through the hierarchy, it's extremely difficult to implement all > the necessary hooks to perform the translations at different places. Joerg