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Date: Mon, 30 Aug 2010 11:36:49 +0900
From: Isaku Yamahata <yamahata@valinux.co.jp>
Subject: Re: [Qemu-devel] Re: Unusual physical address when using 64-bit BAR
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To: Cam Macdonell <cam@cs.ualberta.ca>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, seabios@seabios.org, Avi Kivity <avi@redhat.com>, "Michael S. Tsirkin" <mst@redhat.com>

On Fri, Aug 27, 2010 at 01:35:23PM -0600, Cam Macdonell wrote:
> In upstream seabios.git, the c040 is not written, but the device
> returns ffffffff from 0x1c (only reads and writes to 0x18 and 0x1c are
> shown below)
> 
> pci_read_config: (val) 0x4 <- 0x18 (addr)
> pci_write_config: (val) 0xffffffff -> 0x18 (addr)
> pci_read_config: (val) 0xe0000004 <- 0x18 (addr)
> pci_write_config: (val) 0x4 -> 0x18 (addr)
> pci_read_config: (val) 0x4 <- 0x18 (addr)
	this read is useless. I sent out the patch.

> pci_write_config: (val) 0x0 -> 0x18 (addr)
> pci_write_config: (val) 0x0 -> 0x1c (addr)

It looks like that overflow occurred. You need overflow patch.
As the size is huge, seabios can't map it.
Anyway even with overflow patch, the expected result is
to leave the bar unmodified(initial value).


> pci_read_config: (val) 0x4 <- 0x18 (addr)
> pci_write_config: (val) 0xffffffff -> 0x18 (addr)
> IVSHMEM: guest pci addr = e0000000, guest h/w addr = 2164588544, size = 20000000
> pci_read_config: (val) 0xe0000004 <- 0x18 (addr)
> pci_write_config: (val) 0x4 -> 0x18 (addr)
> pci_read_config: (val) 0x0 <- 0x1c (addr)
> pci_write_config: (val) 0xffffffff -> 0x1c (addr)
> IVSHMEM: guest pci addr = ffffffff00000000, guest h/w addr =
> 2164588544, size = 20000000
> pci_read_config: (val) 0xffffffff <- 0x1c (addr)
> pci_write_config: (val) 0x0 -> 0x1c (addr)

Is the above done by guest OS?
The guest OS doesn't seem to know 64bit bar.

-- 
yamahata