From: "Michael S. Tsirkin" <mst@redhat.com>
To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: skandasa@cisco.com, adhyas@gmail.com, etmartin@cisco.com,
qemu-devel@nongnu.org, wexu2@cisco.com
Subject: Re: [Qemu-devel] Re: [PATCH v2 2/9] pcie: helper functions for pcie extended capability.
Date: Sun, 19 Sep 2010 13:51:59 +0200 [thread overview]
Message-ID: <20100919115159.GG7350@redhat.com> (raw)
In-Reply-To: <20100919041121.GD6132@valinux.co.jp>
On Sun, Sep 19, 2010 at 01:11:21PM +0900, Isaku Yamahata wrote:
> On Wed, Sep 15, 2010 at 03:05:13PM +0200, Michael S. Tsirkin wrote:
> > On Wed, Sep 15, 2010 at 02:50:01PM +0900, Isaku Yamahata wrote:
> > > On Wed, Sep 08, 2010 at 01:31:22PM +0300, Michael S. Tsirkin wrote:
> > > > > +
> > > > > +static void pcie_notify(PCIDevice *dev, uint16_t vector,
> > > > > + bool trigger, int level)
> > > > > +{
> > > > > + /* masking/masking interrupt is handled by upper layer.
> > > > > + * i.e. msix_notify() for MSI-X
> > > > > + * msi_notify() for MSI
> > > > > + * pci_set_irq() for INTx
> > > > > + */
> > > >
> > > > So this will send another interrupt when level is 0?
> > >
> > > Yes. The condition that triggers MSI-X/MSI can be different from
> > > the one that asserts INTx as you can see it in the following code.
> > > trigger and level are set independently.
> >
> > Looks like a bug ...
>
> No. It can and the spec requires it. The mode of INTx and MSI is exclusive.
> I think that it's quite reasonable to assume the basic knowledge
> of express. For example
>
> >From 6.7.3.4. Software Notification of Hot-Plug Events
>
> > If the Port is enabled for level-triggered interrupt signaling using
> > the INTx messages, the virtualization INTx wire must be asserted whenever
> > and as long as the following conditions are satisfied:
>
> and the list of conditions..
>
> > If the Port is enabled for edge-triggered interrupt signaling using
> > MSI or MSI-X, an interrupt message must be sent every time the logical
> > AND of the following conditions transitions from FALSE to TRUE:
>
> and the list of conditions.
I guess I just don't seem to be able to map the code to spec.
I don't understand what trigger and level are.
I think it would become clearer if we have two functions:
assert and dessert - instead of attempting to encode
it all as level and trigger.
Deassert would simply do nothing for msi/msix.
> yamahata
next prev parent reply other threads:[~2010-09-19 11:58 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-08 7:39 [Qemu-devel] [PATCH v2 0/9] pcie port switch emulators Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 1/9] msi: implemented msi Isaku Yamahata
2010-09-08 9:13 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-08 9:49 ` Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 2/9] pcie: helper functions for pcie extended capability Isaku Yamahata
2010-09-08 10:31 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-14 10:29 ` Isaku Yamahata
2010-09-14 12:23 ` Michael S. Tsirkin
2010-09-15 5:50 ` Isaku Yamahata
2010-09-15 13:05 ` Michael S. Tsirkin
2010-09-19 4:11 ` Isaku Yamahata
2010-09-19 11:51 ` Michael S. Tsirkin [this message]
2010-09-08 17:38 ` Wei Xu
2010-09-12 7:49 ` Blue Swirl
2010-09-12 13:26 ` Michael S. Tsirkin
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 3/9] pcie port: define struct PCIEPort/PCIESlot and helper functions Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 4/9] pcie root port: implement pcie root port Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 5/9] pcie upstream port: pci express switch upstream port Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 6/9] pcie downstream port: pci express switch downstream port Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 7/9] pcie/hotplug: glue pushing attention button command. pcie_abp Isaku Yamahata
2010-09-08 10:34 ` [Qemu-devel] " Michael S. Tsirkin
2010-09-09 3:43 ` Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 8/9] pcie/aer: glue aer error injection into qemu monitor Isaku Yamahata
2010-09-08 7:39 ` [Qemu-devel] [PATCH v2 9/9] msix: clear not only INTA, but all INTx when MSI-X is enabled Isaku Yamahata
2010-09-08 10:33 ` [Qemu-devel] " Michael S. Tsirkin
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