From: Marcelo Tosatti <mtosatti@redhat.com>
To: kvm@vger.kernel.org, qemu-devel@nongnu.org
Cc: Dean Nelson <dnelson@redhat.com>,
Marcelo Tosatti <mtosatti@redhat.com>,
Huang Ying <ying.huang@intel.com>
Subject: [Qemu-devel] [patch 4/8] kvm: x86: add mce support
Date: Mon, 11 Oct 2010 15:31:18 -0300 [thread overview]
Message-ID: <20101011183226.859336893@redhat.com> (raw)
In-Reply-To: 20101011183114.455477545@redhat.com
[-- Attachment #1: mce --]
[-- Type: text/plain, Size: 4540 bytes --]
Port qemu-kvm's MCE support
commit c68b2374c9048812f488e00ffb95db66c0bc07a7
Author: Huang Ying <ying.huang@intel.com>
Date: Mon Jul 20 10:00:53 2009 +0800
Add MCE simulation support to qemu/kvm
KVM ioctls are used to initialize MCE simulation and inject MCE. The
real MCE simulation is implemented in Linux kernel. The Kernel part
has been merged.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Index: qemu/target-i386/helper.c
===================================================================
--- qemu.orig/target-i386/helper.c
+++ qemu/target-i386/helper.c
@@ -27,6 +27,7 @@
#include "exec-all.h"
#include "qemu-common.h"
#include "kvm.h"
+#include "kvm_x86.h"
//#define DEBUG_MMU
@@ -1030,6 +1031,11 @@ void cpu_inject_x86_mce(CPUState *cenv,
if (bank >= bank_num || !(status & MCI_STATUS_VAL))
return;
+ if (kvm_enabled()) {
+ kvm_inject_x86_mce(cenv, bank, status, mcg_status, addr, misc);
+ return;
+ }
+
/*
* if MSR_MCG_CTL is not all 1s, the uncorrected error
* reporting is disabled
Index: qemu/target-i386/kvm.c
===================================================================
--- qemu.orig/target-i386/kvm.c
+++ qemu/target-i386/kvm.c
@@ -27,6 +27,7 @@
#include "hw/pc.h"
#include "hw/apic.h"
#include "ioport.h"
+#include "kvm_x86.h"
#ifdef CONFIG_KVM_PARA
#include <linux/kvm_para.h>
@@ -167,6 +168,67 @@ static int get_para_features(CPUState *e
}
#endif
+#ifdef KVM_CAP_MCE
+static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
+ int *max_banks)
+{
+ int r;
+
+ r = kvm_ioctl(s, KVM_CHECK_EXTENSION, KVM_CAP_MCE);
+ if (r > 0) {
+ *max_banks = r;
+ return kvm_ioctl(s, KVM_X86_GET_MCE_CAP_SUPPORTED, mce_cap);
+ }
+ return -ENOSYS;
+}
+
+static int kvm_setup_mce(CPUState *env, uint64_t *mcg_cap)
+{
+ return kvm_vcpu_ioctl(env, KVM_X86_SETUP_MCE, mcg_cap);
+}
+
+static int kvm_set_mce(CPUState *env, struct kvm_x86_mce *m)
+{
+ return kvm_vcpu_ioctl(env, KVM_X86_SET_MCE, m);
+}
+
+struct kvm_x86_mce_data
+{
+ CPUState *env;
+ struct kvm_x86_mce *mce;
+};
+
+static void kvm_do_inject_x86_mce(void *_data)
+{
+ struct kvm_x86_mce_data *data = _data;
+ int r;
+
+ r = kvm_set_mce(data->env, data->mce);
+ if (r < 0)
+ perror("kvm_set_mce FAILED");
+}
+#endif
+
+void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
+ uint64_t mcg_status, uint64_t addr, uint64_t misc)
+{
+#ifdef KVM_CAP_MCE
+ struct kvm_x86_mce mce = {
+ .bank = bank,
+ .status = status,
+ .mcg_status = mcg_status,
+ .addr = addr,
+ .misc = misc,
+ };
+ struct kvm_x86_mce_data data = {
+ .env = cenv,
+ .mce = &mce,
+ };
+
+ run_on_cpu(cenv, kvm_do_inject_x86_mce, &data);
+#endif
+}
+
int kvm_arch_init_vcpu(CPUState *env)
{
struct {
@@ -274,6 +336,28 @@ int kvm_arch_init_vcpu(CPUState *env)
cpuid_data.cpuid.nent = cpuid_i;
+#ifdef KVM_CAP_MCE
+ if (((env->cpuid_version >> 8)&0xF) >= 6
+ && (env->cpuid_features&(CPUID_MCE|CPUID_MCA)) == (CPUID_MCE|CPUID_MCA)
+ && kvm_check_extension(env->kvm_state, KVM_CAP_MCE) > 0) {
+ uint64_t mcg_cap;
+ int banks;
+
+ if (kvm_get_mce_cap_supported(env->kvm_state, &mcg_cap, &banks))
+ perror("kvm_get_mce_cap_supported FAILED");
+ else {
+ if (banks > MCE_BANKS_DEF)
+ banks = MCE_BANKS_DEF;
+ mcg_cap &= MCE_CAP_DEF;
+ mcg_cap |= banks;
+ if (kvm_setup_mce(env, &mcg_cap))
+ perror("kvm_setup_mce FAILED");
+ else
+ env->mcg_cap = mcg_cap;
+ }
+ }
+#endif
+
return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data);
}
Index: qemu/target-i386/kvm_x86.h
===================================================================
--- /dev/null
+++ qemu/target-i386/kvm_x86.h
@@ -0,0 +1,21 @@
+/*
+ * QEMU KVM support
+ *
+ * Copyright (C) 2009 Red Hat Inc.
+ * Copyright IBM, Corp. 2008
+ *
+ * Authors:
+ * Anthony Liguori <aliguori@us.ibm.com>
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#ifndef __KVM_X86_H__
+#define __KVM_X86_H__
+
+void kvm_inject_x86_mce(CPUState *cenv, int bank, uint64_t status,
+ uint64_t mcg_status, uint64_t addr, uint64_t misc);
+
+#endif
next prev parent reply other threads:[~2010-10-11 18:38 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-04 18:54 [Qemu-devel] [patch uq/master 0/8] port qemu-kvm's MCE support Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 1/8] signalfd compatibility Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 2/8] iothread: use signalfd Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 3/8] Expose thread_id in info cpus Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 4/8] kvm: x86: add mce support Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 5/8] Export qemu_ram_addr_from_host Marcelo Tosatti
2010-10-05 12:57 ` [Qemu-devel] " Anthony Liguori
2010-10-05 20:13 ` Marcelo Tosatti
2010-10-05 20:48 ` Anthony Liguori
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 6/8] Add RAM -> physical addr mapping in MCE simulation Marcelo Tosatti
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 7/8] MCE: Relay UCR MCE to guest Marcelo Tosatti
2010-10-06 1:10 ` [Qemu-devel] " Hidetoshi Seto
2010-10-06 16:02 ` Marcelo Tosatti
2010-10-06 1:58 ` Hidetoshi Seto
2010-10-06 16:05 ` Marcelo Tosatti
2010-10-06 18:10 ` Dean Nelson
2010-10-07 3:41 ` Hidetoshi Seto
2010-10-07 15:23 ` Dean Nelson
2010-10-08 3:15 ` Huang Ying
2010-10-08 5:54 ` Hidetoshi Seto
2010-10-08 12:02 ` Dean Nelson
2010-10-08 2:50 ` Huang Ying
2010-10-04 18:54 ` [Qemu-devel] [patch uq/master 8/8] Add savevm/loadvm support for MCE Marcelo Tosatti
2010-10-05 16:31 ` [Qemu-devel] [patch uq/master 0/8] port qemu-kvm's MCE support Andreas Färber
2010-10-05 18:58 ` Chris Wright
2010-10-05 20:24 ` Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 0/8] port qemu-kvm's MCE support (v2) Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 1/8] signalfd compatibility Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 2/8] iothread: use signalfd Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 3/8] Expose thread_id in info cpus Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 4/8] kvm: x86: add mce support Marcelo Tosatti
2010-10-06 19:32 ` [Qemu-devel] " Anthony Liguori
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 5/8] Export qemu_ram_addr_from_host Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 6/8] Add RAM -> physical addr mapping in MCE simulation Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 7/8] MCE: Relay UCR MCE to guest Marcelo Tosatti
2010-10-06 17:34 ` [Qemu-devel] [patch uq/master 8/8] Add savevm/loadvm support for MCE Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 0/8] port qemu-kvm's MCE support (v3) Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 1/8] signalfd compatibility Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 2/8] iothread: use signalfd Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 3/8] Expose thread_id in info cpus Marcelo Tosatti
2010-10-11 18:31 ` Marcelo Tosatti [this message]
2010-10-11 18:31 ` [Qemu-devel] [patch 5/8] Export qemu_ram_addr_from_host Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 6/8] Add RAM -> physical addr mapping in MCE simulation Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 7/8] MCE: Relay UCR MCE to guest Marcelo Tosatti
2010-10-11 18:31 ` [Qemu-devel] [patch 8/8] Add savevm/loadvm support for MCE Marcelo Tosatti
2010-10-14 10:25 ` [Qemu-devel] Re: [patch 0/8] port qemu-kvm's MCE support (v3) Avi Kivity
2010-10-14 16:21 ` Marcelo Tosatti
2010-10-17 9:32 ` [Qemu-devel] Re: [patch 0/8] port qemu-kvm's MCE support (v3 resend) Avi Kivity
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