From: "Michael S. Tsirkin" <mst@redhat.com>
To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: skandasa@cisco.com, adnan@khaleel.us, etmartin@cisco.com,
qemu-devel@nongnu.org, wexu2@cisco.com
Subject: [Qemu-devel] Re: [PATCH v4 00/15] pcie port switch emulators
Date: Mon, 18 Oct 2010 08:24:05 +0200 [thread overview]
Message-ID: <20101018062405.GB19214@redhat.com> (raw)
In-Reply-To: <cover.1287371107.git.yamahata@valinux.co.jp>
On Mon, Oct 18, 2010 at 12:17:41PM +0900, Isaku Yamahata wrote:
>
> Here is v4 of the pcie patch series.
> - PCIDevice::written
> The abuse of PCIDevice::config to record a written bit of non-modifiable
> registers is confusing and bad style. So I introduced PCIDevice::written.
> - FLR stuff
> I didn't addresse FLR function pointer issue. Anyway in order to
> make FLR work, Qdev bus reset must be addresssed.
> So Let's discuss it at the next phase.
So let's just punt and add FLR as a stub, not call anything from it.
> new patches: 1, 2, 3, 4, 5
> Other patches are (almost) same as before except adjustment to compile.
> The patches of 1, 2, 3 and 5 can be harmlessly merged, I think.
>
> Patch description:
> This patch series implements pcie port switch emulators
> which is basic part for pcie/q35 support.
> This is for mst/pci tree.
>
> changes v3 -> v4:
> - introduced new pci config helper functions.(clear set bit)
> - various clean up and some bug fixes.
> - dropped pci_shift_xxx().
> - dropped function pointerin pcie_aer.h
> - dropped pci_exp_cap(), pcie_aer_cap().
> - file rename (pcie_{root, upstream, downsatrem} => ioh33420, x3130).
>
> changes v2 -> v3:
> - msi: improved commant and simplified shift/ffs dance
> - pci w1c config register framework
> - split pcie.[ch] into pcie_regs.h, pcie.[ch] and pcie_aer.[ch]
> - pcie, aer: many changes by following reviews.
>
> changes v1 -> v2:
> - update msi
> - dropped already pushed out patches.
> - added msix patches.
>
>
> Isaku Yamahata (15):
> pci: make pci_del_capability() update for w1cmask
> pci: introduce helper functions to clear/set bits in configuration
> space
> pci: use pci_clear_bit_word() in pci_device_reset()
> pci: record which is written into pci configuration space
> pci/bridge: fix pci_bridge_reset()
> msi: implements msi
> pcie: add pcie constants to pcie_regs.h
> pcie: helper functions for pcie capability and extended capability
> pcie/aer: helper functions for pcie aer capability
> pcie port: define struct PCIEPort/PCIESlot and helper functions
> ioh3420: pcie root port in X58 ioh
> x3130: pcie upstream port
> x3130: pcie downstream port
> pcie/hotplug: introduce pushing attention button command
> pcie/aer: glue aer error injection into qemu monitor
>
> Makefile.objs | 4 +-
> hw/ioh3420.c | 228 ++++++++++++
> hw/ioh3420.h | 10 +
> hw/msi.c | 352 +++++++++++++++++++
> hw/msi.h | 41 +++
> hw/pci.c | 16 +-
> hw/pci.h | 92 +++++-
> hw/pci_bridge.c | 15 +-
> hw/pcie.c | 529 ++++++++++++++++++++++++++++
> hw/pcie.h | 112 ++++++
> hw/pcie_aer.c | 873 +++++++++++++++++++++++++++++++++++++++++++++++
> hw/pcie_aer.h | 105 ++++++
> hw/pcie_port.c | 197 +++++++++++
> hw/pcie_port.h | 51 +++
> hw/pcie_regs.h | 154 +++++++++
> hw/xio3130_downstream.c | 207 +++++++++++
> hw/xio3130_downstream.h | 11 +
> hw/xio3130_upstream.c | 188 ++++++++++
> hw/xio3130_upstream.h | 10 +
> qemu-common.h | 6 +
> qemu-monitor.hx | 36 ++
> sysemu.h | 9 +
> 22 files changed, 3233 insertions(+), 13 deletions(-)
> create mode 100644 hw/ioh3420.c
> create mode 100644 hw/ioh3420.h
> create mode 100644 hw/msi.c
> create mode 100644 hw/msi.h
> create mode 100644 hw/pcie.c
> create mode 100644 hw/pcie.h
> create mode 100644 hw/pcie_aer.c
> create mode 100644 hw/pcie_aer.h
> create mode 100644 hw/pcie_port.c
> create mode 100644 hw/pcie_port.h
> create mode 100644 hw/pcie_regs.h
> create mode 100644 hw/xio3130_downstream.c
> create mode 100644 hw/xio3130_downstream.h
> create mode 100644 hw/xio3130_upstream.c
> create mode 100644 hw/xio3130_upstream.h
prev parent reply other threads:[~2010-10-18 6:30 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-10-18 3:17 [Qemu-devel] [PATCH v4 00/15] pcie port switch emulators Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 01/15] pci: make pci_del_capability() update for w1cmask Isaku Yamahata
2010-10-18 6:06 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 02/15] pci: introduce helper functions to clear/set bits in configuration space Isaku Yamahata
2010-10-18 5:42 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 6:32 ` Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 03/15] pci: use pci_clear_bit_word() in pci_device_reset() Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 04/15] pci: record which is written into pci configuration space Isaku Yamahata
2010-10-18 5:38 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 7:17 ` Isaku Yamahata
2010-10-18 7:32 ` Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 05/15] pci/bridge: fix pci_bridge_reset() Isaku Yamahata
2010-10-18 6:22 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 7:10 ` Isaku Yamahata
2010-10-18 7:08 ` Michael S. Tsirkin
2010-10-18 7:44 ` Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 06/15] msi: implements msi Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 07/15] pcie: add pcie constants to pcie_regs.h Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 08/15] pcie: helper functions for pcie capability and extended capability Isaku Yamahata
2010-10-18 5:38 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 09/15] pcie/aer: helper functions for pcie aer capability Isaku Yamahata
2010-10-18 5:45 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 10/15] pcie port: define struct PCIEPort/PCIESlot and helper functions Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 11/15] ioh3420: pcie root port in X58 ioh Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 12/15] x3130: pcie upstream port Isaku Yamahata
2010-10-18 4:59 ` [Qemu-devel] " Michael S. Tsirkin
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 13/15] x3130: pcie downstream port Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 14/15] pcie/hotplug: introduce pushing attention button command Isaku Yamahata
2010-10-18 3:17 ` [Qemu-devel] [PATCH v4 15/15] pcie/aer: glue aer error injection into qemu monitor Isaku Yamahata
2010-10-18 6:24 ` Michael S. Tsirkin [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20101018062405.GB19214@redhat.com \
--to=mst@redhat.com \
--cc=adnan@khaleel.us \
--cc=etmartin@cisco.com \
--cc=qemu-devel@nongnu.org \
--cc=skandasa@cisco.com \
--cc=wexu2@cisco.com \
--cc=yamahata@valinux.co.jp \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).